[PATCH] D66228: [mips] Fix 64-bit address loading in case of applying 32-bit mask to the result

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 14 17:04:04 PDT 2019


sdardis added a comment.

This looks OK to me, I'd like to take a hard look at what DAGCombiner is doing here.

Can you also supply a test case where the mask has the topmost bit in an i32 set so that we can catch the sign extension cases?



================
Comment at: llvm/lib/Target/Mips/Mips64InstrInfo.td:687
+  def : MipsPat<(shl (MipsHi (i64 tglobaladdr:$in)), (i32 16)),
+                (LUi64 tglobaladdr:$in)>, ISA_MIPS3, GPR_64;
+  def : MipsPat<(shl (MipsHi (i64 tblockaddress:$in)), (i32 16)),
----------------
This addition and below needs SYM_64 I believe.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66228/new/

https://reviews.llvm.org/D66228





More information about the llvm-commits mailing list