[PATCH] D66236: [SDAG][x86] check for relaxed math when matching an FP reduction

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 14 12:25:20 PDT 2019


craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:35487
 
   unsigned HorizOpcode = Opc == ISD::ADD ? X86ISD::HADD : X86ISD::FHADD;
 
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So was the FP part of this just unusable before now?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66236/new/

https://reviews.llvm.org/D66236





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