[PATCH] D66077: [GlobalISel] Handle multiple registers in dbg.value intrinsic

[Amara Emerson via Phabricator via llvm-commits]

aemerson added inline comments.


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Comment at: llvm/test/CodeGen/Generic/DbgValueAggregate.ll:1
+; RUN: llc -O0 -global-isel < %s | FileCheck %s
+
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Can you add a target triple here instead of relying on the default. I assume this triggered on AArch64?


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  https://reviews.llvm.org/D66077/new/

https://reviews.llvm.org/D66077