[PATCH] D66190: [CodeGen] Add a pass to do block predication on SSA machine IR

[Thomas Raoux via Phabricator via llvm-commits]

ThomasRaoux created this revision.
ThomasRaoux added reviewers: jmolloy, majnemer.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

For targets requiring aggressive scheduling and/or software pipeline we need to apply predication before preRA scheduling. This adds a pass re-using the early if-cvt infrastructure but generating predicated instructions instead of speculatively executing instructions. It allows doing if conversion on blocks containing instructions with side-effects. The pass re-use the target hook from postRA if-conversion to let the target decide on the heuristic to apply.
Since there are currently no target supporting both predicate and implementing insertselect target hook I'm not able to add tests for it at this point.


Repository:
  rL LLVM

https://reviews.llvm.org/D66190

Files:
  llvm/include/llvm/CodeGen/Passes.h
  llvm/include/llvm/InitializePasses.h
  llvm/lib/CodeGen/CodeGen.cpp
  llvm/lib/CodeGen/EarlyIfConversion.cpp

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