[PATCH] D63741: [TableGen] Add "InitValue": Handle operands with set bit values in decoder methods

[Daniel Sanders via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL368458: [TableGen] Add "InitValue": Handle operands with set bit values in decoder… (authored by dsanders, committed by ).
Herald added a project: LLVM.

Changed prior to commit:
  https://reviews.llvm.org/D63741?vs=206305&id=214402#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63741/new/

https://reviews.llvm.org/D63741

Files:
  llvm/trunk/test/TableGen/FixedLenDecoderEmitter/InitValue.td
  llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp


Index: llvm/trunk/test/TableGen/FixedLenDecoderEmitter/InitValue.td
===================================================================
--- llvm/trunk/test/TableGen/FixedLenDecoderEmitter/InitValue.td
+++ llvm/trunk/test/TableGen/FixedLenDecoderEmitter/InitValue.td
@@ -0,0 +1,35 @@
+// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+
+def archInstrInfo : InstrInfo { }
+
+def arch : Target {
+    let InstructionSet = archInstrInfo;
+}
+
+let OutOperandList = (outs), Size = 2 in {
+
+def foo : Instruction {
+    let InOperandList = (ins i32imm:$factor);
+    field bits<16> Inst;
+    field bits<16> SoftFail = 0;
+    bits<8> factor;
+    let factor{0} = 0; // zero initial value
+    let Inst{15-8} = factor{7-0};
+    }
+
+def bar : Instruction {
+    let InOperandList = (ins i32imm:$factor);
+    field bits<16> Inst;
+    field bits<16> SoftFail = 0;
+    bits<8> factor;
+    let factor{0} = 1; // non-zero initial value
+    let Inst{15-8} = factor{7-0};
+    }
+
+}
+
+// CHECK: tmp = fieldFromInstruction(insn, 9, 7) << 1;
+// CHECK: tmp = 0x1;
+// CHECK: tmp |= fieldFromInstruction(insn, 9, 7) << 1;
Index: llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp
===================================================================
--- llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -64,9 +64,10 @@
   std::vector<EncodingField> Fields;
   std::string Decoder;
   bool HasCompleteDecoder;
+  uint64_t InitValue;
 
   OperandInfo(std::string D, bool HCD)
-      : Decoder(std::move(D)), HasCompleteDecoder(HCD) {}
+      : Decoder(std::move(D)), HasCompleteDecoder(HCD), InitValue(0) {}
 
   void addField(unsigned Base, unsigned Width, unsigned Offset) {
     Fields.push_back(EncodingField(Base, Width, Offset));
@@ -1103,12 +1104,15 @@
                                      bool &OpHasCompleteDecoder) const {
   const std::string &Decoder = OpInfo.Decoder;
 
-  if (OpInfo.numFields() != 1)
-    o.indent(Indentation) << "tmp = 0;\n";
+  if (OpInfo.numFields() != 1 || OpInfo.InitValue != 0) {
+    o.indent(Indentation) << "tmp = 0x";
+    o.write_hex(OpInfo.InitValue);
+    o << ";\n";
+  }
 
   for (const EncodingField &EF : OpInfo) {
     o.indent(Indentation) << "tmp ";
-    if (OpInfo.numFields() != 1) o << '|';
+    if (OpInfo.numFields() != 1 || OpInfo.InitValue != 0) o << '|';
     o << "= fieldFromInstruction"
       << "(insn, " << EF.Base << ", " << EF.Width << ')';
     if (OpInfo.numFields() != 1 || EF.Offset != 0)
@@ -2026,6 +2030,16 @@
       HasCompleteDecoderBit->getValue() : true;
 
     OperandInfo OpInfo(Decoder, HasCompleteDecoder);
+
+    // Some bits of the operand may be required to be 1 depending on the
+    // instruction's encoding. Collect those bits.
+    if (const RecordVal *EncodedValue = EncodingDef.getValue(Op.second))
+      if (const BitsInit *OpBits = dyn_cast<BitsInit>(EncodedValue->getValue()))
+        for (unsigned I = 0; I < OpBits->getNumBits(); ++I)
+          if (const BitInit *OpBit = dyn_cast<BitInit>(OpBits->getBit(I)))
+            if (OpBit->getValue())
+              OpInfo.InitValue |= 1 << I;
+
     unsigned Base = ~0U;
     unsigned Width = 0;
     unsigned Offset = 0;


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D63741.214402.patch
Type: text/x-patch
Size: 3289 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190809/5939f0d0/attachment.bin>