[PATCH] D65583: [ARM] MVE big endian loads/stores

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:4789
+  def  : Pat<(v4i1 (load t2addrmode_imm7<2>:$addr)),
+             (v4i1 (VLDR_P0_off t2addrmode_imm7<2>:$addr))>;
 }
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simon_tatham wrote:
> samparker wrote:
> > Do we support v2i1 as well?
> Currently, v2i1 isn't listed among the vector-of-i1 types that are legal in the VCCR regclass, so it probably wouldn't help to add a pattern for it here.
> 
> I have a small patch that adds it in various other places, as part of my unfinished prototype for the ACLE MVE intrinsics support. If it's becoming urgent, I could easily pull that patch out and submit it before I get the rest finished?
Great, sounds like a good thing to get in so we can decouple autoveec work from intrinsic support.


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  https://reviews.llvm.org/D65583/new/

https://reviews.llvm.org/D65583