[llvm] r368234 - [ScalarizeMaskedMemIntrin] Add test case for expanding scatter.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed Aug  7 16:16:29 2019
New Revision: 368234

URL: http://llvm.org/viewvc/llvm-project?rev=368234&view=rev
Log:
[ScalarizeMaskedMemIntrin] Add test case for expanding scatter.

This pass expands 6 intrinsics, but we only had test for 5 of
them.

Added:
    llvm/trunk/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll

Added: llvm/trunk/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll?rev=368234&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll (added)
+++ llvm/trunk/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-scatter.ll Wed Aug  7 16:16:29 2019
@@ -0,0 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S %s -scalarize-masked-mem-intrin -mtriple=x86_64-linux-gnu | FileCheck %s
+
+define void @scalarize_v2i64(<2 x i64*> %p, <2 x i1> %mask, <2 x i64> %value) {
+; CHECK-LABEL: @scalarize_v2i64(
+; CHECK-NEXT:    [[SCALAR_MASK:%.*]] = bitcast <2 x i1> [[MASK:%.*]] to i2
+; CHECK-NEXT:    [[TMP1:%.*]] = and i2 [[SCALAR_MASK]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i2 [[TMP1]], 0
+; CHECK-NEXT:    br i1 [[TMP2]], label [[COND_STORE:%.*]], label [[ELSE:%.*]]
+; CHECK:       cond.store:
+; CHECK-NEXT:    [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0
+; CHECK-NEXT:    store i64 [[ELT0]], i64* [[PTR0]], align 8
+; CHECK-NEXT:    br label [[ELSE]]
+; CHECK:       else:
+; CHECK-NEXT:    [[TMP3:%.*]] = and i2 [[SCALAR_MASK]], -2
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i2 [[TMP3]], 0
+; CHECK-NEXT:    br i1 [[TMP4]], label [[COND_STORE1:%.*]], label [[ELSE2:%.*]]
+; CHECK:       cond.store1:
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
+; CHECK-NEXT:    br label [[ELSE2]]
+; CHECK:       else2:
+; CHECK-NEXT:    ret void
+;
+  call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> %mask)
+  ret void
+}
+
+define void @scalarize_v2i64_ones_mask(<2 x i64*> %p, <2 x i64> %value) {
+; CHECK-LABEL: @scalarize_v2i64_ones_mask(
+; CHECK-NEXT:    [[ELT0:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 0
+; CHECK-NEXT:    [[PTR0:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 0
+; CHECK-NEXT:    store i64 [[ELT0]], i64* [[PTR0]], align 8
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
+; CHECK-NEXT:    ret void
+;
+  call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 true, i1 true>)
+  ret void
+}
+
+define void @scalarize_v2i64_zero_mask(<2 x i64*> %p, <2 x i64> %value) {
+; CHECK-LABEL: @scalarize_v2i64_zero_mask(
+; CHECK-NEXT:    ret void
+;
+  call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 false>)
+  ret void
+}
+
+define void @scalarize_v2i64_const_mask(<2 x i64*> %p, <2 x i64> %value) {
+; CHECK-LABEL: @scalarize_v2i64_const_mask(
+; CHECK-NEXT:    [[ELT1:%.*]] = extractelement <2 x i64> [[VALUE:%.*]], i64 1
+; CHECK-NEXT:    [[PTR1:%.*]] = extractelement <2 x i64*> [[P:%.*]], i64 1
+; CHECK-NEXT:    store i64 [[ELT1]], i64* [[PTR1]], align 8
+; CHECK-NEXT:    ret void
+;
+  call void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64> %value, <2 x i64*> %p, i32 8, <2 x i1> <i1 false, i1 true>)
+  ret void
+}
+
+declare void @llvm.masked.scatter.v2i64.v2p0i64(<2 x i64>, <2 x i64*>, i32, <2 x i1>)