[llvm] r367880 - [InstCombine] add extra use constraint for shl-zext fold

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Aug  5 09:04:07 2019
New Revision: 367880

URL: http://llvm.org/viewvc/llvm-project?rev=367880&view=rev
Log:
[InstCombine] add extra use constraint for shl-zext fold

As the test shows, we can end up with more instructions than
we started with if we don't include the extra-use check.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/test/Transforms/InstCombine/shift.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=367880&r1=367879&r2=367880&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Mon Aug  5 09:04:07 2019
@@ -718,7 +718,7 @@ Instruction *InstCombiner::visitShl(Bina
     // shl (zext X), ShAmt --> zext (shl X, ShAmt)
     // This is only valid if X would have zeros shifted out.
     Value *X;
-    if (match(Op0, m_ZExt(m_Value(X)))) {
+    if (match(Op0, m_OneUse(m_ZExt(m_Value(X))))) {
       unsigned SrcWidth = X->getType()->getScalarSizeInBits();
       if (ShAmt < SrcWidth &&
           MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmt), 0, &I))

Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=367880&r1=367879&r2=367880&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift.ll Mon Aug  5 09:04:07 2019
@@ -1198,8 +1198,7 @@ define i64 @shl_zext_extra_use(i32 %t) {
 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[T:%.*]], 16777215
 ; CHECK-NEXT:    [[EXT:%.*]] = zext i32 [[AND]] to i64
 ; CHECK-NEXT:    call void @use(i64 [[EXT]])
-; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[T]], 8
-; CHECK-NEXT:    [[SHL:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT:    [[SHL:%.*]] = shl nuw nsw i64 [[EXT]], 8
 ; CHECK-NEXT:    ret i64 [[SHL]]
 ;
   %and = and i32 %t, 16777215