[PATCH] D63860: [MachineCSE] Extend CSE heuristic

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 5 07:40:24 PDT 2019


arsenm added a comment.

Mostly LGTM, except for the empty block case I'm worried about



================
Comment at: lib/CodeGen/MachineCSE.cpp:422
+getUsesTrivialSuccessor(unsigned Reg, const MachineRegisterInfo &MRI) {
+
+  MachineBasicBlock *BBUses = nullptr;
----------------
Extra empty line


================
Comment at: test/CodeGen/AMDGPU/cse-phi-incoming-val.mir:73
+---
+
----------------
Can you add another test with a totally empty successor block? I think those should also be ignored


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63860/new/

https://reviews.llvm.org/D63860





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