[PATCH] D65219: [RISCV GlobalISel] Adding initial GlobalISel infrastructure

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 26 02:22:54 PDT 2019


Petar.Avramovic added a comment.

Since there are no generic instructions in test function you can run all globalisel passes for it, not just irtranslator.
I got two compiler/tablegen warnings. Other then that look good.



================
Comment at: llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp:65-67
+#define GET_GLOBALISEL_IMPL
+#include "RISCVGenGlobalISel.inc"
+#undef GET_GLOBALISEL_IMPL
----------------
This defines `RISCVInstructionSelector::selectImpl` , but it is unused at the moment.


================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterBanks.td:13
+/// General Purpose Registers: X.
+def GPRRegBank : RegisterBank<"GPR", [GPR]>;
----------------
RegisterBankEmitter emits warning here:
Register bank names should be distinct from register classes to avoid ambiguous MIR
RegisterBank was declared here
def GPRRegBank : RegisterBank<"GPR", [GPR]>;
RegisterClass was declared here
def GPR : RegisterClass<"RISCV", [XLenVT], 32, (add


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65219/new/

https://reviews.llvm.org/D65219





More information about the llvm-commits mailing list