[PATCH] D65366: [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: RKSimon, spatel, hermord.
lebedev.ri added a project: LLVM.
Herald added subscribers: dexonsmith, hiraditya, javed.absar.
lebedev.ri added a subscriber: thakis.

This implements an optimization described in Hacker's Delight 10-17:
when `C` is constant, the result of `X % C == 0` can be computed
more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.

One huge caveat: this signed case is only valid for positive divisors.

While we can freely negate negative divisors, we can't negate `INT_MIN`,
so for now if `INT_MIN` is encountered, we bailout.
As a follow-up, it should be possible to handle that more gracefully
via extra `and`+`setcc`+`select`.

This passes llvm's test-suite, and from cursory(!) cross-examination
the folds (the assembly) match those of GCC, and manual checking via alive
did not reveal any issues (other than the `INT_MIN` case)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D65366

Files:
  llvm/include/llvm/ADT/APInt.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/srem-seteq-optsize.ll
  llvm/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
  llvm/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
  llvm/test/CodeGen/AArch64/srem-seteq.ll
  llvm/test/CodeGen/X86/srem-seteq-optsize.ll
  llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
  llvm/test/CodeGen/X86/srem-seteq-vec-splat.ll
  llvm/test/CodeGen/X86/srem-seteq.ll
  llvm/test/CodeGen/X86/vselect-avx.ll

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