[PATCH] D65244: [AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp.

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added reviewers: paquette, phosek.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
Herald added a project: LLVM.

Throughout the legalizerinfo we currently make the assumption that the target has neon and FP target features available. Fixing it will require a refactor of the whole thing, so until then make sure we fall back.

Works around PR42734


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D65244

Files:
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll


Index: llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
@@ -0,0 +1,13 @@
+; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-unknown"
+
+; CHECK: unable to legalize instruction: G_STORE %1:_(s128), %0:_(p0) :: (store 16 into %ir.ptr) (in function: foo)
+define void @foo(i128 *%ptr) #0 align 2 {
+entry:
+  store i128 0, i128* %ptr, align 16
+  ret void
+}
+
+attributes #0 = { "use-soft-float"="false" "target-features"="-fp-armv8,-neon" }
+
Index: llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
@@ -52,6 +52,12 @@
   const LLT v2s64 = LLT::vector(2, 64);
   const LLT v2p0 = LLT::vector(2, p0);
 
+  // FIXME: support subtargets which have neon/fp-armv8 disabled.
+  if (!ST.hasNEON() || !ST.hasFPARMv8()) {
+    computeTables();
+    return;
+  }
+
   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
     .legalFor({p0, s1, s8, s16, s32, s64, v4s32, v2s64})
     .clampScalar(0, s1, s64)


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