[llvm] r366938 - [AMDGPU] Increase kernel padding

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 24 12:40:13 PDT 2019


Author: rampitec
Date: Wed Jul 24 12:40:13 2019
New Revision: 366938

URL: http://llvm.org/viewvc/llvm-project?rev=366938&view=rev
Log:
[AMDGPU] Increase kernel padding

To support prefetch mode 3 we need to pad current
cacheline and fill 3 cachelines after. Current padding
is only sufficient for mode 2.

Differential Revision: https://reviews.llvm.org/D65236

Modified:
    llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
    llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll

Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp?rev=366938&r1=366937&r2=366938&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp Wed Jul 24 12:40:13 2019
@@ -250,7 +250,7 @@ bool AMDGPUTargetAsmStreamer::EmitHSAMet
 bool AMDGPUTargetAsmStreamer::EmitCodeEnd() {
   const uint32_t Encoded_s_code_end = 0xbf9f0000;
   OS << "\t.p2alignl 6, " << Encoded_s_code_end << '\n';
-  OS << "\t.fill 32, 4, " << Encoded_s_code_end << '\n';
+  OS << "\t.fill 48, 4, " << Encoded_s_code_end << '\n';
   return true;
 }
 
@@ -602,7 +602,7 @@ bool AMDGPUTargetELFStreamer::EmitCodeEn
   MCStreamer &OS = getStreamer();
   OS.PushSection();
   OS.EmitValueToAlignment(64, Encoded_s_code_end, 4);
-  for (unsigned I = 0; I < 32; ++I)
+  for (unsigned I = 0; I < 48; ++I)
     OS.EmitIntValue(Encoded_s_code_end, 4);
   OS.PopSection();
   return true;

Modified: llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll?rev=366938&r1=366937&r2=366938&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll Wed Jul 24 12:40:13 2019
@@ -35,47 +35,14 @@ define amdgpu_kernel void @a_kernel2() {
 ; GCN-ASM-NEXT:   [[END_LABEL3:\.Lfunc_end.*]]:
 ; GCN-ASM-NEXT:           .size   a_function, [[END_LABEL3]]-a_function
 ; GFX10END-ASM:           .p2alignl 6, 3214868480
-; GFX10END-ASM-NEXT:      .fill 32, 4, 3214868480
+; GFX10END-ASM-NEXT:      .fill 48, 4, 3214868480
 ; GFX10NOEND-NOT:         .fill
 
 ; GFX10NOEND-OBJ-NOT:     s_code_end
 ; GFX10END-OBJ-NEXT:      s_code_end
 
 ; GFX10END-OBJ:           s_code_end // 000000000140:
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
-; GFX10END-OBJ-NEXT:      s_code_end
+; GFX10END-OBJ-COUNT-47:  s_code_end
 
 define void @a_function() {
   ret void




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