[PATCH] D65166: [AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.

Tue Jul 23 14:19:55 PDT 2019

aemerson created this revision.
aemerson added a reviewer: paquette.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka.
Herald added a project: LLVM.
aemerson marked an inline comment as done.
aemerson added inline comments.

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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir:4

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-name:            test_extracts_1
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These tests are being removed because they don't do anything useful anymore after we may s128 loads legal.

We need to be able to load and store s128 for memcpy inlining, where we want to generate Q register mem ops. Making these legal also requires that we add some support in other instructions. Regbankselect should also know about these since they have no GPR register class that can hold them, so need special handling to live on the FPR bank.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D65166

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
  llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract.mir
  llvm/test/CodeGen/AArch64/GlobalISel/regbank-trunc-s128.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-extract.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-trunc.mir

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