[PATCH] D65052: [ARM] MVE predicate register support

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


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Comment at: llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll:188
+; CHECK-NEXT:    rsbs r0, r0, #0
+; CHECK-NEXT:    bfi r2, r0, #0, #1
+; CHECK-NEXT:    bfi r2, r0, #1, #1
----------------
Why aren't these just one: bfi r2, r0, #0, #16 or uxth r2, r0?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65052/new/

https://reviews.llvm.org/D65052