[PATCH] D65124: AMDGPU: Correct behavior of f16 buffer loads

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.

Don't assume format loads for f16. Also fixes support for targets
without i16.


https://reviews.llvm.org/D65124

Files:
  lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  lib/Target/AMDGPU/BUFInstructions.td
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D65124.211222.patch
Type: text/x-patch
Size: 17349 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190722/f6e10150/attachment.bin>