[PATCH] D64862: AMDGPU/GlobalISel: RegBankSelect interp intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:1332
+      // Waterfall loop for m0 value, which is always the last operand.
+      executeInWaterfallLoop(MI, MRI, { MI.getNumOperands() - 1 });
+      return;
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nhaehnle wrote:
> We don't waterfall these in the non-GlobalISel path as far as I can tell? Should just use readfirstlane if necessary.
I think this is more of a defect in SelectionDAG because handling this correctly is hard. I’m considering adding a pseudo UniformVGPR register bank for cases where readfirstlane is OK


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https://reviews.llvm.org/D64862