[PATCH] D65007: [AMDGPU] Autogenerate register sequences in tuples

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 19 14:44:51 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rG05d9e6a2a3d2: [AMDGPU] Autogenerate register sequences in tuples (authored by rampitec).
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

Changed prior to commit:
  https://reviews.llvm.org/D65007?vs=210874&id=210907#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65007/new/

https://reviews.llvm.org/D65007

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td

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