[llvm] r366611 - [InstCombine] Add test cases for PR42691. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Fri Jul 19 13:48:52 2019
New Revision: 366611

URL: http://llvm.org/viewvc/llvm-project?rev=366611&view=rev
Log:
[InstCombine] Add test cases for PR42691. NFC

Modified:
    llvm/trunk/test/Transforms/InstCombine/and-or-icmps.ll

Modified: llvm/trunk/test/Transforms/InstCombine/and-or-icmps.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-or-icmps.ll?rev=366611&r1=366610&r2=366611&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and-or-icmps.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/and-or-icmps.ll Fri Jul 19 13:48:52 2019
@@ -253,3 +253,86 @@ define void @simplify_before_foldAndOfIC
   ret void
 }
 
+define i1 @PR42691_1(i32 %x) {
+; CHECK-LABEL: @PR42691_1(
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT:    [[C2:%.*]] = icmp eq i32 %x, 2147483647
+; CHECK-NEXT:    [[C:%.*]] = or i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp slt i32 %x, 0
+  %c2 = icmp eq i32 %x, 2147483647
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_2(i32 %x) {
+; CHECK-LABEL: @PR42691_2(
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, -2
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %c1 = icmp ult i32 %x, 2147483648
+  %c2 = icmp eq i32 %x, 4294967295
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_3(i32 %x) {
+; CHECK-LABEL: @PR42691_3(
+; CHECK-NEXT:    [[C1:%.*]] = icmp sgt i32 %x, -1
+; CHECK-NEXT:    [[C2:%.*]] = icmp eq i32 %x, -2147483648
+; CHECK-NEXT:    [[C:%.*]] = or i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp sge i32 %x, 0
+  %c2 = icmp eq i32 %x, -2147483648
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_4(i32 %x) {
+; CHECK-LABEL: @PR42691_4(
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 %x, 1
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %c1 = icmp uge i32 %x, 2147483648
+  %c2 = icmp eq i32 %x, 0
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_5(i32 %x) {
+; CHECK-LABEL: @PR42691_5(
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 %x, 1
+; CHECK-NEXT:    [[C2:%.*]] = icmp eq i32 %x, 2147483647
+; CHECK-NEXT:    [[C:%.*]] = or i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp slt i32 %x, 1
+  %c2 = icmp eq i32 %x, 2147483647
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_6(i32 %x) {
+; CHECK-LABEL: @PR42691_6(
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, -2
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %c1 = icmp ult i32 %x, 2147483648
+  %c2 = icmp eq i32 %x, 4294967295
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_7(i32 %x) {
+; CHECK-LABEL: @PR42691_7(
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 %x, -1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
+; CHECK-NEXT:    ret i1 [[TMP2]]
+;
+  %c1 = icmp uge i32 %x, 2147483649
+  %c2 = icmp eq i32 %x, 0
+  %c = or i1 %c1, %c2
+  ret i1 %c
+}