[PATCH] D64919: TableGen: Support physical register inputs > 255

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, hfinkel, craig.topper.
Herald added subscribers: tpr, wdng.

This was truncating register value that didn't fit in unsigned char.
Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.


https://reviews.llvm.org/D64919

Files:
  include/llvm/CodeGen/SelectionDAGISel.h
  lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  utils/TableGen/DAGISelMatcher.h
  utils/TableGen/DAGISelMatcherEmitter.cpp
  utils/TableGen/DAGISelMatcherGen.cpp

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