[PATCH] D64908: Fix and test inter-procedural register allocation for ARM

Oliver Stannard (Linaro) via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 18 02:58:37 PDT 2019


ostannard created this revision.
ostannard added reviewers: mehdi_amini, arsenm.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar, wdng.
Herald added a project: LLVM.

- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves with a null RegScavenger. Simply not updating the register scavenger is fine because IPRA only cares about the SavedRegs vector, the acutal code of the function has already been generated at this point.
- Add a new hook to TargetRegisterInfo to get the set of registers which can be clobbered inside a call, even if the compiler can see both sides, by linker-generated code.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D64908

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/lib/CodeGen/RegUsageInfoCollector.cpp
  llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
  llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
  llvm/lib/Target/ARM/ARMFrameLowering.cpp
  llvm/test/CodeGen/ARM/ipra.ll

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