[PATCH] D63973: [MachineVerifier] Improve checks of target instructions operands.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa added a comment.

In D63973#1582205 <https://reviews.llvm.org/D63973#1582205>, @atanasyan wrote:

> I hope the problem with MIPS tests was fixed at the rL365870 <https://reviews.llvm.org/rL365870>.


Yes :-)

I see now:

Failing Tests (5):

  LLVM :: CodeGen/Hexagon/expand-condsets-phys-reg.mir
  LLVM :: CodeGen/Hexagon/sdr-global.mir
  LLVM :: CodeGen/X86/xray-custom-log.ll
  LLVM :: CodeGen/X86/xray-typed-event-log.ll
  LLVM :: DebugInfo/X86/live-debug-vars-discard-invalid.mir

Should these be "updated"? How?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63973/new/

https://reviews.llvm.org/D63973