[PATCH] D64766: [AMDGPU] Enable merging m0 initializations.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:458-459
+getFirstNonProlog(MachineBasicBlock *MBB, const TargetInstrInfo *TII) {
+  MachineBasicBlock::iterator I = MBB->getFirstNonPHI();
+  while (I != MBB->end() && TII->isBasicBlockPrologue(*I))
+    ++I;
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rampitec wrote:
> arsenm wrote:
> > Why does this need to care about the prolog instructions? (FYI I'm planning on eliminating the rarely followed concept)
> You actually cannot, it was created to prevent RA from insrting spills into endif/else block before we updated exec mask.
Yes, I'm working on splitting the blocks to avoid this


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64766/new/

https://reviews.llvm.org/D64766