[PATCH] D64195: [PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store

[Jinsong Ji via Phabricator via llvm-commits]

jsji requested changes to this revision.
jsji added a comment.
This revision now requires changes to proceed.

In theory this should be a good idea, especially with P9 <https://reviews.llvm.org/P9>, we can remove the "restrict" dispatch constraints for `lfs`/`lfd`.

Can you get some performance data w and w/o this?

Request change to split the NFC patch out. Thanks.



================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:832
+                                           EVT VT) const override {
+      return (Opc == ISD::LOAD || Opc == ISD::STORE) &&
+             VT.getSizeInBits() <= 64;
----------------
Please add some comments here about why we deem it is profitable?


================
Comment at: lib/Target/PowerPC/PPCISelLowering.h:833
+      return (Opc == ISD::LOAD || Opc == ISD::STORE) &&
+             VT.getSizeInBits() <= 64;
+    }
----------------
Maybe it would be better to be explicit here, check for  f32 and f64 only?


================
Comment at: test/CodeGen/PowerPC/float-load-store-pair.ll:4
+
+; This file verifies that for a given floating point load / store pair,
+; if the load value isn't used by any other operations,
----------------
Please commit the testcase in a NFC patch first, then only show difference here. 


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64195/new/

https://reviews.llvm.org/D64195