[PATCH] D64710: [x86] try to keep FP casted+truncated+extracted vector element out of GPRs

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 15 05:11:15 PDT 2019


spatel marked an inline comment as done.
spatel added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:42410
+/// the sequence on XMM registers rather than moving between vector and GPRs.
+static SDValue combineToFPTruncExtElt(SDNode *N, SelectionDAG &DAG) {
+  // TODO: This is currently only used by combineSIntToFP, but it is generalized
----------------
RKSimon wrote:
> Could this be folded into vectorizeExtractedCast (which is done at lowering)?
I did an experiment that just moved this code as-is to be called at lowering rather than combining, and we miss all but the last 2 test diffs in this patch. I didn't check to see how the other tests mutated, but clearly we'd have to match more patterns if we wait until lowering if we wanted to get those other cases. I can investigate more if that seems like the better option. 

My reason for doing the transform earlier is that we know vector bitcasts are generally free if produced early. If created later, they tend to interfere with other pattern matching.


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