[llvm] r366011 - [X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sat Jul 13 21:13:33 2019
New Revision: 366011

URL: http://llvm.org/viewvc/llvm-project?rev=366011&view=rev
Log:
[X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287.

This was copy/pasted from above and I forgot to change it. We just
need the default offset of 0 here.

Fixes PR42616.

Added:
    llvm/trunk/test/CodeGen/X86/pr42616.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=366011&r1=366010&r2=366011&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sat Jul 13 21:13:33 2019
@@ -4641,7 +4641,7 @@ MachineInstr *X86InstrInfo::foldMemoryOp
       unsigned RCSize = TRI.getRegSizeInBits(*RC) / 8;
       if ((Size == 0 || Size >= 16) && RCSize >= 16 && Align < 16) {
         MachineInstr *NewMI =
-            FuseInst(MF, X86::MOVHPDrm, OpNum, MOs, InsertPt, MI, *this, 8);
+            FuseInst(MF, X86::MOVHPDrm, OpNum, MOs, InsertPt, MI, *this);
         return NewMI;
       }
     }

Added: llvm/trunk/test/CodeGen/X86/pr42616.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr42616.ll?rev=366011&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr42616.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr42616.ll Sat Jul 13 21:13:33 2019
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 | FileCheck %s
+
+define <2 x double> @pr42616(<2 x double> %a0, <2 x double> %a1, <2 x double>* %p) {
+  ;CHECK-LABEL: pr42616
+  ;CHECK:       movhpd (%esp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
+  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
+  %2 = load <2 x double>, <2 x double>* %p, align 1
+  %3 = shufflevector <2 x double> %a1, <2 x double> %2, <2 x i32> <i32 2, i32 0>
+  %4 = fadd <2 x double> %a0, %3
+  ret <2 x double> %4
+}