[llvm] r365998 - [x86] simplify cmov with same true/false operands

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 13 05:04:52 PDT 2019


Author: spatel
Date: Sat Jul 13 05:04:52 2019
New Revision: 365998

URL: http://llvm.org/viewvc/llvm-project?rev=365998&view=rev
Log:
[x86] simplify cmov with same true/false operands

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/combine-sbb.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=365998&r1=365997&r2=365998&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Jul 13 05:04:52 2019
@@ -36783,6 +36783,10 @@ static SDValue combineCMov(SDNode *N, Se
   X86::CondCode CC = (X86::CondCode)N->getConstantOperandVal(2);
   SDValue Cond = N->getOperand(3);
 
+  // cmov X, X, ?, ? --> X
+  if (TrueOp == FalseOp)
+    return TrueOp;
+
   // Try to simplify the EFLAGS and condition code operands.
   // We can't always do this as FCMOV only supports a subset of X86 cond.
   if (SDValue Flags = combineSetCCEFLAGS(Cond, CC, DAG, Subtarget)) {

Modified: llvm/trunk/test/CodeGen/X86/combine-sbb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sbb.ll?rev=365998&r1=365997&r2=365998&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sbb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sbb.ll Sat Jul 13 05:04:52 2019
@@ -291,9 +291,8 @@ define i32 @PR40483_sub5(i32*, i32) {
 ;
 ; X64-LABEL: PR40483_sub5:
 ; X64:       # %bb.0:
-; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    subl %esi, (%rdi)
-; X64-NEXT:    cmovael %eax, %eax
+; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    retq
   %3 = load i32, i32* %0, align 8
   %4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)




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