[llvm] r365747 - [ARM] Remove nonexistent unsigned forms of MVE VQDMLAH.
Simon Tatham via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 11 02:52:15 PDT 2019
Author: statham
Date: Thu Jul 11 02:52:15 2019
New Revision: 365747
URL: http://llvm.org/viewvc/llvm-project?rev=365747&view=rev
Log:
[ARM] Remove nonexistent unsigned forms of MVE VQDMLAH.
The VQDMLAH.U8, VQDMLAH.U16 and VQDMLAH.U32 instructions don't
actually exist: the Armv8.1-M architecture spec only lists signed
forms of that instruction. The unsigned ones were added in error: they
existed in an early draft of the spec, but they were removed before
the public version, and we missed that particular spec change.
Also affects the variant forms VQDMLASH, VQRDMLAH and VQRDMLASH.
Reviewers: miyuki
Subscribers: javed.absar, kristof.beyls, hiraditya, dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64502
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrMVE.td
llvm/trunk/test/MC/ARM/mve-qdest-rsrc.s
llvm/trunk/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt
Modified: llvm/trunk/lib/Target/ARM/ARMInstrMVE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td?rev=365747&r1=365746&r2=365747&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrMVE.td Thu Jul 11 02:52:15 2019
@@ -3355,9 +3355,6 @@ multiclass MVE_VQDMLAH_qr_types<string i
def s8 : MVE_VQDMLAH_qr<iname, "s8", 0b0, 0b00, bit_5, bit_12>;
def s16 : MVE_VQDMLAH_qr<iname, "s16", 0b0, 0b01, bit_5, bit_12>;
def s32 : MVE_VQDMLAH_qr<iname, "s32", 0b0, 0b10, bit_5, bit_12>;
- def u8 : MVE_VQDMLAH_qr<iname, "u8", 0b1, 0b00, bit_5, bit_12>;
- def u16 : MVE_VQDMLAH_qr<iname, "u16", 0b1, 0b01, bit_5, bit_12>;
- def u32 : MVE_VQDMLAH_qr<iname, "u32", 0b1, 0b10, bit_5, bit_12>;
}
defm MVE_VQDMLAH_qr : MVE_VQDMLAH_qr_types<"vqdmlah", 0b1, 0b0>;
Modified: llvm/trunk/test/MC/ARM/mve-qdest-rsrc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/mve-qdest-rsrc.s?rev=365747&r1=365746&r2=365747&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/mve-qdest-rsrc.s (original)
+++ llvm/trunk/test/MC/ARM/mve-qdest-rsrc.s Thu Jul 11 02:52:15 2019
@@ -384,16 +384,16 @@ vqdmlash.s16 q0, q5, lr
# CHECK-NOFP: vqdmlash.s32 q0, q2, r3 @ encoding: [0x24,0xee,0x63,0x1e]
vqdmlash.s32 q0, q2, r3
-# CHECK: vqdmlash.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x62,0x1e]
-# CHECK-NOFP: vqdmlash.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x62,0x1e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqdmlash.u8 q0, q4, r2
-# CHECK: vqdmlash.u16 q1, q4, r2 @ encoding: [0x18,0xfe,0x62,0x3e]
-# CHECK-NOFP: vqdmlash.u16 q1, q4, r2 @ encoding: [0x18,0xfe,0x62,0x3e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqdmlash.u16 q1, q4, r2
-# CHECK: vqdmlash.u32 q1, q5, r0 @ encoding: [0x2a,0xfe,0x60,0x3e]
-# CHECK-NOFP: vqdmlash.u32 q1, q5, r0 @ encoding: [0x2a,0xfe,0x60,0x3e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqdmlash.u32 q1, q5, r0
# CHECK: vqdmlah.s8 q0, q3, r3 @ encoding: [0x06,0xee,0x63,0x0e]
@@ -408,16 +408,16 @@ vqdmlah.s16 q5, q3, r9
# CHECK-NOFP: vqdmlah.s32 q0, q1, r11 @ encoding: [0x22,0xee,0x6b,0x0e]
vqdmlah.s32 q0, q1, r11
-# CHECK: vqdmlah.u8 q0, q2, lr @ encoding: [0x04,0xfe,0x6e,0x0e]
-# CHECK-NOFP: vqdmlah.u8 q0, q2, lr @ encoding: [0x04,0xfe,0x6e,0x0e]
+# ERROR: [[@LINE+2]]:8: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:8: error: invalid operand for instruction
vqdmlah.u8 q0, q2, lr
-# CHECK: vqdmlah.u16 q0, q3, r10 @ encoding: [0x16,0xfe,0x6a,0x0e]
-# CHECK-NOFP: vqdmlah.u16 q0, q3, r10 @ encoding: [0x16,0xfe,0x6a,0x0e]
+# ERROR: [[@LINE+2]]:8: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:8: error: invalid operand for instruction
vqdmlah.u16 q0, q3, r10
-# CHECK: vqdmlah.u32 q1, q5, r2 @ encoding: [0x2a,0xfe,0x62,0x2e]
-# CHECK-NOFP: vqdmlah.u32 q1, q5, r2 @ encoding: [0x2a,0xfe,0x62,0x2e]
+# ERROR: [[@LINE+2]]:8: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:8: error: invalid operand for instruction
vqdmlah.u32 q1, q5, r2
# CHECK: vqrdmlash.s8 q0, q5, r10 @ encoding: [0x0a,0xee,0x4a,0x1e]
@@ -432,16 +432,16 @@ vqrdmlash.s16 q0, q3, r2
# CHECK-NOFP: vqrdmlash.s32 q0, q0, r4 @ encoding: [0x20,0xee,0x44,0x1e]
vqrdmlash.s32 q0, q0, r4
-# CHECK: vqrdmlash.u8 q0, q4, r9 @ encoding: [0x08,0xfe,0x49,0x1e]
-# CHECK-NOFP: vqrdmlash.u8 q0, q4, r9 @ encoding: [0x08,0xfe,0x49,0x1e]
+# ERROR: [[@LINE+2]]:10: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:10: error: invalid operand for instruction
vqrdmlash.u8 q0, q4, r9
-# CHECK: vqrdmlash.u16 q0, q6, r12 @ encoding: [0x1c,0xfe,0x4c,0x1e]
-# CHECK-NOFP: vqrdmlash.u16 q0, q6, r12 @ encoding: [0x1c,0xfe,0x4c,0x1e]
+# ERROR: [[@LINE+2]]:10: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:10: error: invalid operand for instruction
vqrdmlash.u16 q0, q6, r12
-# CHECK: vqrdmlash.u32 q0, q3, r7 @ encoding: [0x26,0xfe,0x47,0x1e]
-# CHECK-NOFP: vqrdmlash.u32 q0, q3, r7 @ encoding: [0x26,0xfe,0x47,0x1e]
+# ERROR: [[@LINE+2]]:10: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:10: error: invalid operand for instruction
vqrdmlash.u32 q0, q3, r7
# CHECK: vqrdmlah.s8 q0, q5, r11 @ encoding: [0x0a,0xee,0x4b,0x0e]
@@ -456,16 +456,16 @@ vqrdmlah.s16 q0, q2, r10
# CHECK-NOFP: vqrdmlah.s32 q0, q4, r11 @ encoding: [0x28,0xee,0x4b,0x0e]
vqrdmlah.s32 q0, q4, r11
-# CHECK: vqrdmlah.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x42,0x0e]
-# CHECK-NOFP: vqrdmlah.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x42,0x0e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqrdmlah.u8 q0, q4, r2
-# CHECK: vqrdmlah.u16 q0, q6, r1 @ encoding: [0x1c,0xfe,0x41,0x0e]
-# CHECK-NOFP: vqrdmlah.u16 q0, q6, r1 @ encoding: [0x1c,0xfe,0x41,0x0e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqrdmlah.u16 q0, q6, r1
-# CHECK: vqrdmlah.u32 q0, q4, r2 @ encoding: [0x28,0xfe,0x42,0x0e]
-# CHECK-NOFP: vqrdmlah.u32 q0, q4, r2 @ encoding: [0x28,0xfe,0x42,0x0e]
+# ERROR: [[@LINE+2]]:9: error: invalid operand for instruction
+# ERROR-NOFP: [[@LINE+1]]:9: error: invalid operand for instruction
vqrdmlah.u32 q0, q4, r2
# CHECK: viwdup.u8 q0, lr, r1, #1 @ encoding: [0x0f,0xee,0x60,0x0f]
Modified: llvm/trunk/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt?rev=365747&r1=365746&r2=365747&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt Thu Jul 11 02:52:15 2019
@@ -1,4 +1,5 @@
-# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding %s 2>%t | FileCheck %s
+# RUN: FileCheck --check-prefix=ERROR < %t %s
# RUN: not llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -show-encoding %s &> %t
# RUN: FileCheck --check-prefix=CHECK-NOMVE < %t %s
@@ -382,15 +383,15 @@
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x24,0xee,0x63,0x1e]
-# CHECK: vqdmlash.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x62,0x1e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x08,0xfe,0x62,0x1e]
-# CHECK: vqdmlash.u16 q1, q4, r2 @ encoding: [0x18,0xfe,0x62,0x3e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x18,0xfe,0x62,0x3e]
-# CHECK: vqdmlash.u32 q1, q5, r0 @ encoding: [0x2a,0xfe,0x60,0x3e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x2a,0xfe,0x60,0x3e]
@@ -406,15 +407,15 @@
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x22,0xee,0x6b,0x0e]
-# CHECK: vqdmlah.u8 q0, q2, lr @ encoding: [0x04,0xfe,0x6e,0x0e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x04,0xfe,0x6e,0x0e]
-# CHECK: vqdmlah.u16 q0, q3, r10 @ encoding: [0x16,0xfe,0x6a,0x0e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x16,0xfe,0x6a,0x0e]
-# CHECK: vqdmlah.u32 q1, q5, r2 @ encoding: [0x2a,0xfe,0x62,0x2e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x2a,0xfe,0x62,0x2e]
@@ -430,15 +431,15 @@
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x20,0xee,0x44,0x1e]
-# CHECK: vqrdmlash.u8 q0, q4, r9 @ encoding: [0x08,0xfe,0x49,0x1e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x08,0xfe,0x49,0x1e]
-# CHECK: vqrdmlash.u16 q0, q6, r12 @ encoding: [0x1c,0xfe,0x4c,0x1e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x1c,0xfe,0x4c,0x1e]
-# CHECK: vqrdmlash.u32 q0, q3, r7 @ encoding: [0x26,0xfe,0x47,0x1e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x26,0xfe,0x47,0x1e]
@@ -454,15 +455,15 @@
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x28,0xee,0x4b,0x0e]
-# CHECK: vqrdmlah.u8 q0, q4, r2 @ encoding: [0x08,0xfe,0x42,0x0e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x08,0xfe,0x42,0x0e]
-# CHECK: vqrdmlah.u16 q0, q6, r1 @ encoding: [0x1c,0xfe,0x41,0x0e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x1c,0xfe,0x41,0x0e]
-# CHECK: vqrdmlah.u32 q0, q4, r2 @ encoding: [0x28,0xfe,0x42,0x0e]
+# ERROR: [[@LINE+2]]:2: warning: invalid instruction encoding
# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding
[0x28,0xfe,0x42,0x0e]
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