[llvm] r365679 - Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context

Michael Berg via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 10 11:23:26 PDT 2019


Author: mcberg2017
Date: Wed Jul 10 11:23:26 2019
New Revision: 365679

URL: http://llvm.org/viewvc/llvm-project?rev=365679&view=rev
Log:
Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context

Summary: Unsafe does not map well alone for each of these three cases as it is missing NoNan context when accessed directly with clang.  I have migrated the fold guards to reflect the expectations of handing nan and zero contexts directly (NoNan, NSZ) and some tests with it.  Unsafe does include NSZ, however there is already precedent for using the target option directly to reflect that context. 

Reviewers: spatel, wristow, hfinkel, craig.topper, arsenm

Reviewed By: arsenm

Subscribers: michele.scandale, wdng, javed.absar

Differential Revision: https://reviews.llvm.org/D64450

Added:
    llvm/trunk/test/CodeGen/ARM/nnan-fsub.ll
Removed:
    llvm/trunk/test/CodeGen/ARM/unsafe-fsub.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/fmul-combines.ll
    llvm/trunk/test/CodeGen/X86/fp-fast.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=365679&r1=365678&r2=365679&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Jul 10 11:23:26 2019
@@ -12030,8 +12030,8 @@ SDValue DAGCombiner::visitFADD(SDNode *N
   // Selection pass has a hard time dealing with FP constants.
   bool AllowNewConst = (Level < AfterLegalizeDAG);
 
-  // If 'unsafe math' or nnan is enabled, fold lots of things.
-  if ((Options.UnsafeFPMath || Flags.hasNoNaNs()) && AllowNewConst) {
+  // If nnan is enabled, fold lots of things.
+  if ((Options.NoNaNsFPMath || Flags.hasNoNaNs()) && AllowNewConst) {
     // If allowed, fold (fadd (fneg x), x) -> 0.0
     if (N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
       return DAG.getConstantFP(0.0, DL, VT);
@@ -12171,7 +12171,7 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
 
   if (N0 == N1) {
     // (fsub x, x) -> 0.0
-    if (Options.UnsafeFPMath || Flags.hasNoNaNs())
+    if (Options.NoNaNsFPMath || Flags.hasNoNaNs())
       return DAG.getConstantFP(0.0f, DL, VT);
   }
 
@@ -12249,7 +12249,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N
   if (SDValue NewSel = foldBinOpIntoSelect(N))
     return NewSel;
 
-  if (Options.UnsafeFPMath ||
+  if ((Options.NoNaNsFPMath && Options.NoSignedZerosFPMath) ||
       (Flags.hasNoNaNs() && Flags.hasNoSignedZeros())) {
     // fold (fmul A, 0) -> 0
     if (N1CFP && N1CFP->isZero())

Added: llvm/trunk/test/CodeGen/ARM/nnan-fsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/nnan-fsub.ll?rev=365679&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/nnan-fsub.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/nnan-fsub.ll Wed Jul 10 11:23:26 2019
@@ -0,0 +1,18 @@
+; RUN: llc -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
+; RUN: llc -mcpu=cortex-a9 --enable-no-nans-fp-math < %s | FileCheck -check-prefix=FAST %s
+
+target triple = "armv7-apple-ios"
+
+; SAFE: test
+; FAST: test
+define float @test(float %x, float %y) {
+entry:
+; SAFE: vmul.f32
+; SAFE: vsub.f32
+; FAST: mov r0, #0
+  %0 = fmul float %x, %y
+  %1 = fsub float %0, %0
+  ret float %1
+}
+
+

Removed: llvm/trunk/test/CodeGen/ARM/unsafe-fsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/unsafe-fsub.ll?rev=365678&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/unsafe-fsub.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/unsafe-fsub.ll (removed)
@@ -1,18 +0,0 @@
-; RUN: llc -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
-; RUN: llc -mcpu=cortex-a9 -enable-unsafe-fp-math < %s | FileCheck -check-prefix=FAST %s
-
-target triple = "armv7-apple-ios"
-
-; SAFE: test
-; FAST: test
-define float @test(float %x, float %y) {
-entry:
-; SAFE: vmul.f32
-; SAFE: vsub.f32
-; FAST: mov r0, #0
-  %0 = fmul float %x, %y
-  %1 = fsub float %0, %0
-  ret float %1
-}
-
-

Modified: llvm/trunk/test/CodeGen/X86/fmul-combines.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fmul-combines.ll?rev=365679&r1=365678&r2=365679&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fmul-combines.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fmul-combines.ll Wed Jul 10 11:23:26 2019
@@ -76,12 +76,12 @@ define <4 x float> @constant_fold_fmul_v
   ret <4 x float> %y
 }
 
-define <4 x float> @fmul0_v4f32(<4 x float> %x) #0 {
-; CHECK-LABEL: fmul0_v4f32:
+define <4 x float> @fmul0_v4f32_nsz_nnan(<4 x float> %x) #0 {
+; CHECK-LABEL: fmul0_v4f32_nsz_nnan:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-  %y = fmul <4 x float> %x, <float 0.0, float 0.0, float 0.0, float 0.0>
+  %y = fmul nnan nsz <4 x float> %x, <float 0.0, float 0.0, float 0.0, float 0.0>
   ret <4 x float> %y
 }
 
@@ -90,7 +90,7 @@ define <4 x float> @fmul0_v4f32_undef(<4
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-  %y = fmul <4 x float> %x, <float undef, float 0.0, float undef, float 0.0>
+  %y = fmul nnan nsz <4 x float> %x, <float undef, float 0.0, float undef, float 0.0>
   ret <4 x float> %y
 }
 

Modified: llvm/trunk/test/CodeGen/X86/fp-fast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-fast.ll?rev=365679&r1=365678&r2=365679&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-fast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-fast.ll Wed Jul 10 11:23:26 2019
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx -enable-unsafe-fp-math < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx -enable-unsafe-fp-math --enable-no-nans-fp-math < %s | FileCheck %s
 
 define float @test1(float %a) {
 ; CHECK-LABEL: test1:




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