[llvm] r365676 - [System Model] [TTI] Update cache and prefetch TTI interfaces
David Greene via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 10 11:07:01 PDT 2019
Author: greened
Date: Wed Jul 10 11:07:01 2019
New Revision: 365676
URL: http://llvm.org/viewvc/llvm-project?rev=365676&view=rev
Log:
[System Model] [TTI] Update cache and prefetch TTI interfaces
Rework the TTI cache and software prefetching APIs to prepare for the
introduction of a general system model. Changes include:
- Marking existing interfaces const and/or override as appropriate
- Adding comments
- Adding BasicTTIImpl interfaces that delegate to a subtarget
implementation
- Adding a default "no information" subtarget implementation
Only a handful of targets use these interfaces currently: AArch64,
Hexagon, PPC and SystemZ. AArch64 already has a custom subtarget
implementation, so its custom TTI implementation is migrated to use
the new facilities in BasicTTIImpl to invoke its custom subtarget
implementation. The custom TTI implementations continue to exist for
the other targets with this change. They are not moved over to
subtarget-based implementations.
The end goal is to have the default subtarget implementation defer to
the system model defined by the target. With this change, the default
subtarget implementation essentially returns "no information" for
these interfaces. None of the existing users of TTI will hit that
implementation because they define their own custom TTI
implementations and won't use the BasicTTIImpl implementations.
Once system models are in place for the targets that use these
interfaces, their custom TTI implementations can be removed.
Differential Revision: https://reviews.llvm.org/D63614
Modified:
llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h
llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
llvm/trunk/lib/MC/MCSubtargetInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h
llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h
llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h
llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h
Modified: llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h Wed Jul 10 11:07:01 2019
@@ -812,18 +812,20 @@ public:
/// \return The associativity of the cache level, if available.
llvm::Optional<unsigned> getCacheAssociativity(CacheLevel Level) const;
- /// \return How much before a load we should place the prefetch instruction.
- /// This is currently measured in number of instructions.
+ /// \return How much before a load we should place the prefetch
+ /// instruction. This is currently measured in number of
+ /// instructions.
unsigned getPrefetchDistance() const;
- /// \return Some HW prefetchers can handle accesses up to a certain constant
- /// stride. This is the minimum stride in bytes where it makes sense to start
- /// adding SW prefetches. The default is 1, i.e. prefetch with any stride.
+ /// \return Some HW prefetchers can handle accesses up to a certain
+ /// constant stride. This is the minimum stride in bytes where it
+ /// makes sense to start adding SW prefetches. The default is 1,
+ /// i.e. prefetch with any stride.
unsigned getMinPrefetchStride() const;
- /// \return The maximum number of iterations to prefetch ahead. If the
- /// required number of iterations is more than this number, no prefetching is
- /// performed.
+ /// \return The maximum number of iterations to prefetch ahead. If
+ /// the required number of iterations is more than this number, no
+ /// prefetching is performed.
unsigned getMaxPrefetchIterationsAhead() const;
/// \return The maximum interleave factor that any transform should try to
@@ -1222,12 +1224,26 @@ public:
virtual unsigned getMinimumVF(unsigned ElemWidth) const = 0;
virtual bool shouldConsiderAddressTypePromotion(
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0;
- virtual unsigned getCacheLineSize() = 0;
- virtual llvm::Optional<unsigned> getCacheSize(CacheLevel Level) = 0;
- virtual llvm::Optional<unsigned> getCacheAssociativity(CacheLevel Level) = 0;
- virtual unsigned getPrefetchDistance() = 0;
- virtual unsigned getMinPrefetchStride() = 0;
- virtual unsigned getMaxPrefetchIterationsAhead() = 0;
+ virtual unsigned getCacheLineSize() const = 0;
+ virtual llvm::Optional<unsigned> getCacheSize(CacheLevel Level) const = 0;
+ virtual llvm::Optional<unsigned> getCacheAssociativity(CacheLevel Level) const = 0;
+
+ /// \return How much before a load we should place the prefetch
+ /// instruction. This is currently measured in number of
+ /// instructions.
+ virtual unsigned getPrefetchDistance() const = 0;
+
+ /// \return Some HW prefetchers can handle accesses up to a certain
+ /// constant stride. This is the minimum stride in bytes where it
+ /// makes sense to start adding SW prefetches. The default is 1,
+ /// i.e. prefetch with any stride.
+ virtual unsigned getMinPrefetchStride() const = 0;
+
+ /// \return The maximum number of iterations to prefetch ahead. If
+ /// the required number of iterations is more than this number, no
+ /// prefetching is performed.
+ virtual unsigned getMaxPrefetchIterationsAhead() const = 0;
+
virtual unsigned getMaxInterleaveFactor(unsigned VF) = 0;
virtual unsigned
getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
@@ -1567,22 +1583,36 @@ public:
return Impl.shouldConsiderAddressTypePromotion(
I, AllowPromotionWithoutCommonHeader);
}
- unsigned getCacheLineSize() override {
+ unsigned getCacheLineSize() const override {
return Impl.getCacheLineSize();
}
- llvm::Optional<unsigned> getCacheSize(CacheLevel Level) override {
+ llvm::Optional<unsigned> getCacheSize(CacheLevel Level) const override {
return Impl.getCacheSize(Level);
}
- llvm::Optional<unsigned> getCacheAssociativity(CacheLevel Level) override {
+ llvm::Optional<unsigned> getCacheAssociativity(CacheLevel Level) const override {
return Impl.getCacheAssociativity(Level);
}
- unsigned getPrefetchDistance() override { return Impl.getPrefetchDistance(); }
- unsigned getMinPrefetchStride() override {
+
+ /// Return the preferred prefetch distance in terms of instructions.
+ ///
+ unsigned getPrefetchDistance() const override {
+ return Impl.getPrefetchDistance();
+ }
+
+ /// Return the minimum stride necessary to trigger software
+ /// prefetching.
+ ///
+ unsigned getMinPrefetchStride() const override {
return Impl.getMinPrefetchStride();
}
- unsigned getMaxPrefetchIterationsAhead() override {
+
+ /// Return the maximum prefetch distance in terms of loop
+ /// iterations.
+ ///
+ unsigned getMaxPrefetchIterationsAhead() const override {
return Impl.getMaxPrefetchIterationsAhead();
}
+
unsigned getMaxInterleaveFactor(unsigned VF) override {
return Impl.getMaxInterleaveFactor(VF);
}
Modified: llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h (original)
+++ llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h Wed Jul 10 11:07:01 2019
@@ -363,9 +363,9 @@ public:
return false;
}
- unsigned getCacheLineSize() { return 0; }
+ unsigned getCacheLineSize() const { return 0; }
- llvm::Optional<unsigned> getCacheSize(TargetTransformInfo::CacheLevel Level) {
+ llvm::Optional<unsigned> getCacheSize(TargetTransformInfo::CacheLevel Level) const {
switch (Level) {
case TargetTransformInfo::CacheLevel::L1D:
LLVM_FALLTHROUGH;
@@ -377,7 +377,7 @@ public:
}
llvm::Optional<unsigned> getCacheAssociativity(
- TargetTransformInfo::CacheLevel Level) {
+ TargetTransformInfo::CacheLevel Level) const {
switch (Level) {
case TargetTransformInfo::CacheLevel::L1D:
LLVM_FALLTHROUGH;
@@ -388,11 +388,11 @@ public:
llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
}
- unsigned getPrefetchDistance() { return 0; }
+ unsigned getPrefetchDistance() const { return 0; }
- unsigned getMinPrefetchStride() { return 1; }
+ unsigned getMinPrefetchStride() const { return 1; }
- unsigned getMaxPrefetchIterationsAhead() { return UINT_MAX; }
+ unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
unsigned getMaxInterleaveFactor(unsigned VF) { return 1; }
Modified: llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h (original)
+++ llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h Wed Jul 10 11:07:01 2019
@@ -506,6 +506,34 @@ public:
return BaseT::getInstructionLatency(I);
}
+ virtual Optional<unsigned>
+ getCacheSize(TargetTransformInfo::CacheLevel Level) const {
+ return Optional<unsigned>(
+ getST()->getCacheSize(static_cast<unsigned>(Level)));
+ }
+
+ virtual Optional<unsigned>
+ getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const {
+ return Optional<unsigned>(
+ getST()->getCacheAssociativity(static_cast<unsigned>(Level)));
+ }
+
+ virtual unsigned getCacheLineSize() const {
+ return getST()->getCacheLineSize();
+ }
+
+ virtual unsigned getPrefetchDistance() const {
+ return getST()->getPrefetchDistance();
+ }
+
+ virtual unsigned getMinPrefetchStride() const {
+ return getST()->getMinPrefetchStride();
+ }
+
+ virtual unsigned getMaxPrefetchIterationsAhead() const {
+ return getST()->getMaxPrefetchIterationsAhead();
+ }
+
/// @}
/// \name Vector TTI Implementations
Modified: llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSubtargetInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSubtargetInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCSubtargetInfo.h Wed Jul 10 11:07:01 2019
@@ -221,6 +221,50 @@ public:
auto Found = std::lower_bound(ProcDesc.begin(), ProcDesc.end(), CPU);
return Found != ProcDesc.end() && StringRef(Found->Key) == CPU;
}
+
+ /// Return the cache size in bytes for the given level of cache.
+ /// Level is zero-based, so a value of zero means the first level of
+ /// cache.
+ ///
+ virtual Optional<unsigned> getCacheSize(unsigned Level) const;
+
+ /// Return the cache associatvity for the given level of cache.
+ /// Level is zero-based, so a value of zero means the first level of
+ /// cache.
+ ///
+ virtual Optional<unsigned> getCacheAssociativity(unsigned Level) const;
+
+ /// Return the target cache line size in bytes at a given level.
+ ///
+ virtual Optional<unsigned> getCacheLineSize(unsigned Level) const;
+
+ /// Return the target cache line size in bytes. By default, return
+ /// the line size for the bottom-most level of cache. This provides
+ /// a more convenient interface for the common case where all cache
+ /// levels have the same line size. Return zero if there is no
+ /// cache model.
+ ///
+ virtual unsigned getCacheLineSize() const {
+ Optional<unsigned> Size = getCacheLineSize(0);
+ if (Size)
+ return *Size;
+
+ return 0;
+ }
+
+ /// Return the preferred prefetch distance in terms of instructions.
+ ///
+ virtual unsigned getPrefetchDistance() const;
+
+ /// Return the maximum prefetch distance in terms of loop
+ /// iterations.
+ ///
+ virtual unsigned getMaxPrefetchIterationsAhead() const;
+
+ /// Return the minimum stride necessary to trigger software
+ /// prefetching.
+ ///
+ virtual unsigned getMinPrefetchStride() const;
};
} // end namespace llvm
Modified: llvm/trunk/lib/MC/MCSubtargetInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSubtargetInfo.cpp?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSubtargetInfo.cpp (original)
+++ llvm/trunk/lib/MC/MCSubtargetInfo.cpp Wed Jul 10 11:07:01 2019
@@ -315,3 +315,28 @@ void MCSubtargetInfo::initInstrItins(Ins
InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
ForwardingPaths);
}
+
+Optional<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level) const {
+ return Optional<unsigned>();
+}
+
+Optional<unsigned>
+MCSubtargetInfo::getCacheAssociativity(unsigned Level) const {
+ return Optional<unsigned>();
+}
+
+Optional<unsigned> MCSubtargetInfo::getCacheLineSize(unsigned Level) const {
+ return Optional<unsigned>();
+}
+
+unsigned MCSubtargetInfo::getPrefetchDistance() const {
+ return 0;
+}
+
+unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
+ return 0;
+}
+
+unsigned MCSubtargetInfo::getMinPrefetchStride() const {
+ return 0;
+}
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Wed Jul 10 11:07:01 2019
@@ -344,10 +344,10 @@ public:
unsigned getVectorInsertExtractBaseCost() const {
return VectorInsertExtractBaseCost;
}
- unsigned getCacheLineSize() const { return CacheLineSize; }
- unsigned getPrefetchDistance() const { return PrefetchDistance; }
- unsigned getMinPrefetchStride() const { return MinPrefetchStride; }
- unsigned getMaxPrefetchIterationsAhead() const {
+ unsigned getCacheLineSize() const override { return CacheLineSize; }
+ unsigned getPrefetchDistance() const override { return PrefetchDistance; }
+ unsigned getMinPrefetchStride() const override { return MinPrefetchStride; }
+ unsigned getMaxPrefetchIterationsAhead() const override {
return MaxPrefetchIterationsAhead;
}
unsigned getPrefFunctionAlignment() const { return PrefFunctionAlignment; }
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp Wed Jul 10 11:07:01 2019
@@ -879,22 +879,6 @@ bool AArch64TTIImpl::shouldConsiderAddre
return Considerable;
}
-unsigned AArch64TTIImpl::getCacheLineSize() {
- return ST->getCacheLineSize();
-}
-
-unsigned AArch64TTIImpl::getPrefetchDistance() {
- return ST->getPrefetchDistance();
-}
-
-unsigned AArch64TTIImpl::getMinPrefetchStride() {
- return ST->getMinPrefetchStride();
-}
-
-unsigned AArch64TTIImpl::getMaxPrefetchIterationsAhead() {
- return ST->getMaxPrefetchIterationsAhead();
-}
-
bool AArch64TTIImpl::useReductionIntrinsic(unsigned Opcode, Type *Ty,
TTI::ReductionFlags Flags) const {
assert(isa<VectorType>(Ty) && "Expected Ty to be a vector type");
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h Wed Jul 10 11:07:01 2019
@@ -153,14 +153,6 @@ public:
shouldConsiderAddressTypePromotion(const Instruction &I,
bool &AllowPromotionWithoutCommonHeader);
- unsigned getCacheLineSize();
-
- unsigned getPrefetchDistance();
-
- unsigned getMinPrefetchStride();
-
- unsigned getMaxPrefetchIterationsAhead();
-
bool shouldExpandReduction(const IntrinsicInst *II) const {
return false;
}
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h Wed Jul 10 11:07:01 2019
@@ -68,8 +68,8 @@ public:
bool shouldFavorPostInc() const;
// L1 cache prefetch.
- unsigned getPrefetchDistance() const;
- unsigned getCacheLineSize() const;
+ unsigned getPrefetchDistance() const override;
+ unsigned getCacheLineSize() const override;
/// @}
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp Wed Jul 10 11:07:01 2019
@@ -613,7 +613,7 @@ unsigned PPCTTIImpl::getRegisterBitWidth
}
-unsigned PPCTTIImpl::getCacheLineSize() {
+unsigned PPCTTIImpl::getCacheLineSize() const {
// Check first if the user specified a custom line size.
if (CacheLineSize.getNumOccurrences() > 0)
return CacheLineSize;
@@ -628,7 +628,7 @@ unsigned PPCTTIImpl::getCacheLineSize()
return 64;
}
-unsigned PPCTTIImpl::getPrefetchDistance() {
+unsigned PPCTTIImpl::getPrefetchDistance() const {
// This seems like a reasonable default for the BG/Q (this pass is enabled, by
// default, only on the BG/Q).
return 300;
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h Wed Jul 10 11:07:01 2019
@@ -74,8 +74,8 @@ public:
bool enableInterleavedAccessVectorization();
unsigned getNumberOfRegisters(bool Vector);
unsigned getRegisterBitWidth(bool Vector) const;
- unsigned getCacheLineSize();
- unsigned getPrefetchDistance();
+ unsigned getCacheLineSize() const override;
+ unsigned getPrefetchDistance() const override;
unsigned getMaxInterleaveFactor(unsigned VF);
int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2);
int getArithmeticInstrCost(
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h?rev=365676&r1=365675&r2=365676&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h Wed Jul 10 11:07:01 2019
@@ -59,9 +59,9 @@ public:
unsigned getNumberOfRegisters(bool Vector);
unsigned getRegisterBitWidth(bool Vector) const;
- unsigned getCacheLineSize() { return 256; }
- unsigned getPrefetchDistance() { return 2000; }
- unsigned getMinPrefetchStride() { return 2048; }
+ unsigned getCacheLineSize() const override { return 256; }
+ unsigned getPrefetchDistance() const override { return 2000; }
+ unsigned getMinPrefetchStride() const override { return 2048; }
bool hasDivRemOp(Type *DataType, bool IsSigned);
bool prefersVectorizedAddressing() { return false; }
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