[llvm] r365664 - [TargetLowering] support BlockAddress as "i" inline asm constraint

Nick Desaulniers via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 10 10:08:25 PDT 2019


Author: nickdesaulniers
Date: Wed Jul 10 10:08:25 2019
New Revision: 365664

URL: http://llvm.org/viewvc/llvm-project?rev=365664&view=rev
Log:
[TargetLowering] support BlockAddress as "i" inline asm constraint

Summary:
This allows passing address of labels to inline assembly "i" input
constraints.

Fixes pr/42502.

Reviewers: ostannard

Reviewed By: ostannard

Subscribers: void, echristo, nathanchance, ostannard, javed.absar, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64167

Added:
    llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=365664&r1=365663&r2=365664&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Jul 10 10:08:25 2019
@@ -3632,6 +3632,7 @@ void TargetLowering::LowerAsmOperandForC
 
     GlobalAddressSDNode *GA;
     ConstantSDNode *C;
+    BlockAddressSDNode *BA;
     uint64_t Offset = 0;
 
     // Match (GA) or (C) or (GA+C) or (GA-C) or ((GA+C)+C) or (((GA+C)+C)+C),
@@ -3659,6 +3660,12 @@ void TargetLowering::LowerAsmOperandForC
         Ops.push_back(DAG.getTargetConstant(Offset + ExtVal,
                                             SDLoc(C), MVT::i64));
         return;
+      } else if ((BA = dyn_cast<BlockAddressSDNode>(Op)) &&
+                 ConstraintLetter != 'n') {
+        Ops.push_back(DAG.getTargetBlockAddress(
+            BA->getBlockAddress(), BA->getValueType(0),
+            Offset + BA->getOffset(), BA->getTargetFlags()));
+        return;
       } else {
         const unsigned OpCode = Op.getOpcode();
         if (OpCode == ISD::ADD || OpCode == ISD::SUB) {

Added: llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.ll?rev=365664&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.ll Wed Jul 10 10:08:25 2019
@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
+; CHECK-LABEL: foo:
+; CHECK: TEST .Ltmp0
+define void @foo() {
+entry:
+  br label %bar
+bar:
+  call void asm sideeffect "#TEST $0", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %bar))
+  ret void
+indirectgoto:
+  indirectbr i8* undef, [label %bar]
+}




More information about the llvm-commits mailing list