[PATCH] D64460: AMDGPU: Add 24-bit mul intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

Insert these during codegenprepare.

This works around a DAG issue where generic combines eliminate the and
asserting the high bits are zero, which then exposes an unknown read
source to the mul combine. It doesn't worth the hassle of trying to
insert an AssertZext or something to try to deal with it.


https://reviews.llvm.org/D64460

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
  test/CodeGen/AMDGPU/mad_uint24.ll
  test/CodeGen/AMDGPU/mul.i16.ll
  test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll

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