[PATCH] D64295: [X86][AMDGPU] Add an out parameter to isLoadBitCastBeneficial/isStoreBitCastBeneficial to indicate we shouldn't both checking the alignment.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 208595.
craig.topper added a comment.

Move the allowsMemoryAccess call into isLoadBitCastBeneficial


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64295/new/

https://reviews.llvm.org/D64295

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll
  llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll

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