[PATCH] D57399: AMDGPU/GlobalISel: Add support for wide loads >= 256-bits

Tom Stellard via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 8 20:17:28 PDT 2019


tstellar marked an inline comment as done.
tstellar added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:930-932
+static MachineInstr *getOtherVRegDef(const MachineRegisterInfo &MRI,
+                                     Register Reg,
+                                     const MachineInstr &MI) {
----------------
arsenm wrote:
> I don't understand this, because in SSA there must be exactly 1 def
It's just a temporary state, because RegBankSelect::applyMapping() calls RegBankSelect::repairReg() which inserts a "Repair Instruction" that writes to the register being repaired.  This is done before calling applyMapping() which it assumes will delete the original instruction writing the register.


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  https://reviews.llvm.org/D57399/new/

https://reviews.llvm.org/D57399





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