[PATCH] D64205: [X86][SSE] EltsFromConsecutiveLoads - add basic dereferenceable support

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 8 08:30:56 PDT 2019


RKSimon marked an inline comment as done.
RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:7603
+  // elements.
+  if (FirstLoadedElt == 0 &&
+      (LastLoadedElt == (int)(NumElems - 1) || IsDereferenceable) &&
----------------
niravd wrote:
> Any reason that FirstLoadedElt must be zero if IsDereferenceable? I didn't see anything beyond the CreateLoad where that predicate could be relocated.
> 
> It'd be nice if we could pull the first/last checks up into the IsDereferenceable definition.
> 
> 
At the moment the only usecases I have for dereferencable ranges is for entire vector loads.

MachinePointerInfo::isDereferenceable() could be extended to have a -ve and +ve "span" range so we could work with partial 'insertion' loads but I haven't seen a usecase for it yet.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64205/new/

https://reviews.llvm.org/D64205





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