[PATCH] D64172: Basic codegen for MTE stack tagging.

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard added a comment.
Herald added a subscriber: wuzish.

I think this could do with some more tests covering different stack layouts. In particular, we should check that we do the correct thing for functions which use frame or base pointers, and when large stack frames cause the immediates in STG and ADDG instructions go out of range.



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Comment at: llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h:151
+  virtual SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl,
+                                          SDValue Chain, SDValue Op1,
+                                          SDValue Op2,
----------------
Could Op1 and Op2 be given more descriptive names? It looks like they are always the pointer and length of the memory region.


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Comment at: llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp:368
+  }
+  MachineBasicBlock::iterator I =
+      BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVi64imm), SizeReg)
----------------
Could we make the size a register input to these pseudo-instructions, so that this gets done by normal code-generation?


Repository:
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  https://reviews.llvm.org/D64172/new/

https://reviews.llvm.org/D64172