[PATCH] D64220: [PowerPC] Remove redundant load immediate instructions

[Yi-Hong Lyu via Phabricator via llvm-commits]

Yi-Hong.Lyu created this revision.
Yi-Hong.Lyu added reviewers: hfinkel, jsji, echristo, nemanjai.
Herald added subscribers: llvm-commits, MaskRay, kbarton, hiraditya.
Herald added a project: LLVM.

Currently PowerPC backend emits code like this:

  r3 = li 0
  std r3, 264(r1)
  r3 = li 0
  std r3, 272(r1)

This patch fixes that and other cases where a register already contains a value that is loaded so we will get:

  r3 = li 0
  std r3, 264(r1)
  std r3, 272(r1)


https://reviews.llvm.org/D64220

Files:
  llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
  llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.mir

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