[llvm] r365069 - Fix precedence in assert from r364961

[Jessica Paquette via llvm-commits]

Author: paquette
Date: Wed Jul  3 11:30:01 2019
New Revision: 365069

URL: http://llvm.org/viewvc/llvm-project?rev=365069&view=rev
Log:
Fix precedence in assert from r364961

Precedence was wrong in an assert added in r364961. Add braces around the
assertion condition to make it right.

See: https://reviews.llvm.org/D64084

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=365069&r1=365068&r2=365069&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Wed Jul  3 11:30:01 2019
@@ -2935,7 +2935,8 @@ MachineInstr *AArch64InstructionSelector
   Register ZReg;
 
   LLT CmpTy = MRI.getType(LHS.getReg());
-  assert(CmpTy.isScalar() || CmpTy.isPointer() && "Expected scalar or pointer");
+  assert((CmpTy.isScalar() || CmpTy.isPointer()) &&
+         "Expected scalar or pointer");
   if (CmpTy == LLT::scalar(32)) {
     CmpOpc = AArch64::SUBSWrr;
     ZReg = AArch64::WZR;