[llvm] r364844 - [NFC][InstCombine] More commutative tests for "shift direction in bittest" (PR42466)
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 1 13:33:56 PDT 2019
Author: lebedevri
Date: Mon Jul 1 13:33:56 2019
New Revision: 364844
URL: http://llvm.org/viewvc/llvm-project?rev=364844&view=rev
Log:
[NFC][InstCombine] More commutative tests for "shift direction in bittest" (PR42466)
'and' is commutative, if we don't want to touch shift-of-const,
we still need to check the other hand of 'and'.
Modified:
llvm/trunk/test/Transforms/InstCombine/shift-direction-in-bit-test.ll
Modified: llvm/trunk/test/Transforms/InstCombine/shift-direction-in-bit-test.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-direction-in-bit-test.ll?rev=364844&r1=364843&r2=364844&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift-direction-in-bit-test.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift-direction-in-bit-test.ll Mon Jul 1 13:33:56 2019
@@ -109,14 +109,59 @@ define i1 @t5_twoshifts0(i32 %a, i32 %b,
ret i1 %t3
}
+define i1 @t6_twoshifts1(i32 %a, i32 %b, i32 %c, i32 %d) {
+; CHECK-LABEL: @t6_twoshifts1(
+; CHECK-NEXT: [[T0:%.*]] = shl i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[C:%.*]], [[D:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[T0]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: ret i1 [[T3]]
+;
+ %t0 = shl i32 %a, %b
+ %t1 = shl i32 %c, %d
+ %t2 = and i32 %t1, %t0
+ %t3 = icmp eq i32 %t2, 0
+ ret i1 %t3
+}
+
+define i1 @t7_twoshifts2(i32 %a, i32 %b, i32 %c, i32 %d) {
+; CHECK-LABEL: @t7_twoshifts2(
+; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[B:%.*]]
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[C:%.*]], [[D:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[T0]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: ret i1 [[T3]]
+;
+ %t0 = shl i32 1, %b
+ %t1 = shl i32 %c, %d
+ %t2 = and i32 %t1, %t0
+ %t3 = icmp eq i32 %t2, 0
+ ret i1 %t3
+}
+
+define i1 @t8_twoshifts3(i32 %a, i32 %b, i32 %c, i32 %d) {
+; CHECK-LABEL: @t8_twoshifts3(
+; CHECK-NEXT: [[T0:%.*]] = shl i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[D:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[T0]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: ret i1 [[T3]]
+;
+ %t0 = shl i32 %a, %b
+ %t1 = shl i32 1, %d
+ %t2 = and i32 %t1, %t0
+ %t3 = icmp eq i32 %t2, 0
+ ret i1 %t3
+}
+
;------------------------------------------------------------------------------;
; Extra uses
;------------------------------------------------------------------------------;
declare void @use32(i32)
-define i1 @t5_extrause0(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t5_extrause0(
+define i1 @t9_extrause0(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t9_extrause0(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
@@ -130,8 +175,8 @@ define i1 @t5_extrause0(i32 %x, i32 %y,
ret i1 %t2
}
-define i1 @t6_extrause1(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t6_extrause1(
+define i1 @t10_extrause1(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t10_extrause1(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
; CHECK-NEXT: call void @use32(i32 [[T1]])
@@ -145,8 +190,8 @@ define i1 @t6_extrause1(i32 %x, i32 %y,
ret i1 %t2
}
-define i1 @t7_extrause2(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t7_extrause2(
+define i1 @t11_extrause2(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t11_extrause2(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: call void @use32(i32 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
@@ -166,8 +211,8 @@ define i1 @t7_extrause2(i32 %x, i32 %y,
; Constants
;------------------------------------------------------------------------------;
-define i1 @t8_shift_of_const0(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t8_shift_of_const0(
+define i1 @t12_shift_of_const0(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t12_shift_of_const0(
; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
@@ -178,8 +223,8 @@ define i1 @t8_shift_of_const0(i32 %x, i3
%t2 = icmp eq i32 %t1, 0
ret i1 %t2
}
-define i1 @t9_shift_of_const1(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t9_shift_of_const1(
+define i1 @t13_shift_of_const1(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t13_shift_of_const1(
; CHECK-NEXT: [[T0:%.*]] = lshr i32 1, [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
@@ -191,8 +236,8 @@ define i1 @t9_shift_of_const1(i32 %x, i3
ret i1 %t2
}
-define i1 @t10_and_with_const0(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t10_and_with_const0(
+define i1 @t14_and_with_const0(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t14_and_with_const0(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 1, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[TMP2]], 0
@@ -203,8 +248,8 @@ define i1 @t10_and_with_const0(i32 %x, i
%t2 = icmp eq i32 %t1, 0
ret i1 %t2
}
-define i1 @t11_and_with_const1(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @t11_and_with_const1(
+define i1 @t15_and_with_const1(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @t15_and_with_const1(
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 1, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[TMP2]], 0
@@ -220,8 +265,8 @@ define i1 @t11_and_with_const1(i32 %x, i
; Negative test
;------------------------------------------------------------------------------;
-define i1 @n8(i32 %x, i32 %y, i32 %z) {
-; CHECK-LABEL: @n8(
+define i1 @n16(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @n16(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[Z:%.*]]
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 1
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