[llvm] r364769 - AMDGPU: Convert some places to Register

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 1 06:44:46 PDT 2019


Author: arsenm
Date: Mon Jul  1 06:44:46 2019
New Revision: 364769

URL: http://llvm.org/viewvc/llvm-project?rev=364769&view=rev
Log:
AMDGPU: Convert some places to Register

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
    llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h?rev=364769&r1=364768&r2=364769&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h Mon Jul  1 06:44:46 2019
@@ -10,6 +10,7 @@
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUARGUMENTUSAGEINFO_H
 
 #include "llvm/ADT/DenseMap.h"
+#include "llvm/CodeGen/Register.h"
 #include "llvm/IR/Function.h"
 #include "llvm/Pass.h"
 
@@ -28,7 +29,7 @@ private:
   friend class AMDGPUArgumentUsageInfo;
 
   union {
-    unsigned Register;
+    Register Reg;
     unsigned StackOffset;
   };
 
@@ -41,18 +42,18 @@ private:
 public:
   ArgDescriptor(unsigned Val = 0, unsigned Mask = ~0u,
                 bool IsStack = false, bool IsSet = false)
-    : Register(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
+    : Reg(Val), Mask(Mask), IsStack(IsStack), IsSet(IsSet) {}
 
-  static ArgDescriptor createRegister(unsigned Reg, unsigned Mask = ~0u) {
+  static ArgDescriptor createRegister(Register Reg, unsigned Mask = ~0u) {
     return ArgDescriptor(Reg, Mask, false, true);
   }
 
-  static ArgDescriptor createStack(unsigned Reg, unsigned Mask = ~0u) {
+  static ArgDescriptor createStack(Register Reg, unsigned Mask = ~0u) {
     return ArgDescriptor(Reg, Mask, true, true);
   }
 
   static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) {
-    return ArgDescriptor(Arg.Register, Mask, Arg.IsStack, Arg.IsSet);
+    return ArgDescriptor(Arg.Reg, Mask, Arg.IsStack, Arg.IsSet);
   }
 
   bool isSet() const {
@@ -67,9 +68,9 @@ public:
     return !IsStack;
   }
 
-  unsigned getRegister() const {
+  Register getRegister() const {
     assert(!IsStack);
-    return Register;
+    return Reg;
   }
 
   unsigned getStackOffset() const {

Modified: llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h?rev=364769&r1=364768&r2=364769&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h Mon Jul  1 06:44:46 2019
@@ -476,9 +476,9 @@ public:
     return ArgInfo.getPreloadedValue(Value);
   }
 
-  unsigned getPreloadedReg(AMDGPUFunctionArgInfo::PreloadedValue Value) const {
+  Register getPreloadedReg(AMDGPUFunctionArgInfo::PreloadedValue Value) const {
     auto Arg = ArgInfo.getPreloadedValue(Value).first;
-    return Arg ? Arg->getRegister() : 0;
+    return Arg ? Arg->getRegister() : Register();
   }
 
   unsigned getGITPtrHigh() const {




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