[PATCH] D63566: AMDGPU: Fix folding immediate into readfirstlane through reg_sequence

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, nhaehnle.
Herald added subscribers: kbarton, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, nemanjai, kzhuravl.

The def instruction for the vreg may not match, because it may be
folding through a reg_sequence. Just get thet def instruction like
before.

      

For some reason copies aren't making it through the reg_sequence,
although they should.


https://reviews.llvm.org/D63566

Files:
  lib/Target/AMDGPU/GCNDPPCombine.cpp
  lib/Target/AMDGPU/SIFoldOperands.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  test/CodeGen/AMDGPU/constant-address-space-32bit.ll
  test/CodeGen/AMDGPU/fold-readlane.mir

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