[llvm] r363629 - [X86] Make an assert in LowerSCALAR_TO_VECTOR stricter to make it clear what types are allowed here. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 17 16:08:09 PDT 2019


Author: ctopper
Date: Mon Jun 17 16:08:09 2019
New Revision: 363629

URL: http://llvm.org/viewvc/llvm-project?rev=363629&view=rev
Log:
[X86] Make an assert in LowerSCALAR_TO_VECTOR stricter to make it clear what types are allowed here. NFC

Make it clear that only integer type with i32 or smaller elements shoudl get to this part of the code.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=363629&r1=363628&r2=363629&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 17 16:08:09 2019
@@ -17175,7 +17175,8 @@ static SDValue LowerSCALAR_TO_VECTOR(SDV
     // Insert the 128-bit vector.
     return insert128BitVector(DAG.getUNDEF(OpVT), Op, 0, DAG, dl);
   }
-  assert(OpVT.is128BitVector() && "Expected an SSE type!");
+  assert(OpVT.is128BitVector() && OpVT.isInteger() && OpVT != MVT::v2i64 &&
+         "Expected an SSE type!");
 
   // Pass through a v4i32 SCALAR_TO_VECTOR as that's what we use in tblgen.
   if (OpVT == MVT::v4i32)




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