[PATCH] D63247: [ARM] MVE VPT Block Pass

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, dmgreen, simon_tatham, t.p.northover.
Herald added subscribers: hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.
SjoerdMeijer edited the summary of this revision.

Initial commit of a new pass to create vector predication blocks, called VPT
blocks, that are supported by the Armv8.1-M MVE architecture.

This is a first naive implementation. I.e., for 2 consecutive predicated
instructions I1 and I2, for example, it will generate 2 VPT blocks:

  VPST
  I1
  VPST
  I2

A more optimal implementation would obviously put instructions in the same VPT
block when they are predicated on the same condition and when it is allowed to
do this:

  VPTT
  I1
  I2

We will address this optimisation with follow up patches when the groundwork is
in. Creating VPT Blocks is very similar to IT Blocks, which is the reason I
added this to Thumb2ITBlocks.cpp. This allows reuse of the def use analysis
that we need for the more optimal implementation.

VPT blocks cannot be nested in IT blocks, and vice versa, and so these 2 passes
cannot interact with each other. Instructions allowed in VPT blocks must
be MVE instructions that are marked as VPT compatible.

This depends on D62669 <https://reviews.llvm.org/D62669> because of the VPST tablegen instruction description.


https://reviews.llvm.org/D63247

Files:
  llvm/lib/Target/ARM/ARM.h
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
  llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  llvm/lib/Target/ARM/Thumb2InstrInfo.h
  llvm/test/CodeGen/ARM/O3-pipeline.ll

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