[PATCH] D63202: [AMDGPU] gfx1010 premlane instructions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 12 08:26:15 PDT 2019


arsenm added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:1441
+// llvm.amdgcn.permlane16 <old> <src0> <src1> <src2> <fi> <bound_control>
+def int_amdgcn_permlane16 :
+  Intrinsic<[llvm_i32_ty],
----------------
rampitec wrote:
> arsenm wrote:
> > Do these need to be marked as SourceOfDivergence?
> Probably, but in a separate patch. It has vgpr arguments, so shall be treated as divergent anyway I think.
DivergenceAnalysis assumes intrinsic calls are uniform with uniform arguments


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63202/new/

https://reviews.llvm.org/D63202





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