[PATCH] D63160: [AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8

Tim Renouf via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 12 03:32:30 PDT 2019


tpr marked 3 inline comments as done.
tpr added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:348
+  setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8f32, Custom);
 
   // BUFFER/FLAT_ATOMIC_CMP_SWAP on GCN GPUs needs input marshalling,
----------------
arsenm wrote:
> Should this handle MVT::Other and get all the types? What happens with v6i32 or v4i16?
I would prefer not to in this commit. Here I am just trying to undo the damage done by my vec3 and vec5 changes, which (a) added those setOperationActions with Expand, and (b) implemented some joining involving the new vec3/vec5 types in terms of INSERT_SUBVECTOR.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63160/new/

https://reviews.llvm.org/D63160





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