[PATCH] D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.
Alexander via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 5 02:07:11 PDT 2019
alex-t added a comment.
In D59990#1530511 <https://reviews.llvm.org/D59990#1530511>, @hakzsam wrote:
> > I have updated the change ttps://reviews.llvm.org/D62614 this Sunday.
> > The new one takes completely different approach. I'd appreciate very much If you could try it.
>
> D62614 <https://reviews.llvm.org/D62614> doesn't fix the issue.
Okay. I'm about to start partial revert of the change.
Could you please provide me test cases so that I can check if my further fixes help.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D59990/new/
https://reviews.llvm.org/D59990
More information about the llvm-commits
mailing list