[llvm] r362552 - [X86] Add avx512bw to the avx512 machine-combiner-int-vec.ll to ensure we use zmm for v32i16/v64i8.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 14:47:50 PDT 2019
Author: ctopper
Date: Tue Jun 4 14:47:50 2019
New Revision: 362552
URL: http://llvm.org/viewvc/llvm-project?rev=362552&view=rev
Log:
[X86] Add avx512bw to the avx512 machine-combiner-int-vec.ll to ensure we use zmm for v32i16/v64i8.
Modified:
llvm/trunk/test/CodeGen/X86/machine-combiner-int-vec.ll
Modified: llvm/trunk/test/CodeGen/X86/machine-combiner-int-vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-combiner-int-vec.ll?rev=362552&r1=362551&r2=362552&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-combiner-int-vec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-combiner-int-vec.ll Tue Jun 4 14:47:50 2019
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=SSE
; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl,avx512bw -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
; Verify that 128-bit vector logical ops are reassociated.
@@ -1710,15 +1710,22 @@ define <64 x i8> @reassociate_umax_v64i8
; SSE-NEXT: pmaxub {{[0-9]+}}(%rsp), %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_umax_v64i8:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddb %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddb %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpmaxub %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpmaxub %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpmaxub %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpmaxub %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_umax_v64i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpmaxub %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpmaxub %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpmaxub %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpmaxub %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_umax_v64i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddb %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpmaxub %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpmaxub %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <64 x i8> %x0, %x1
%t1 = icmp ugt <64 x i8> %x2, %t0
@@ -1770,15 +1777,22 @@ define <32 x i16> @reassociate_umax_v32i
; SSE-NEXT: pxor %xmm4, %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_umax_v32i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddw %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddw %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpmaxuw %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpmaxuw %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpmaxuw %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpmaxuw %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_umax_v32i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddw %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddw %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpmaxuw %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpmaxuw %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpmaxuw %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpmaxuw %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_umax_v32i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddw %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpmaxuw %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpmaxuw %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <32 x i16> %x0, %x1
%t1 = icmp ugt <32 x i16> %x2, %t0
@@ -2129,15 +2143,22 @@ define <64 x i8> @reassociate_smax_v64i8
; SSE-NEXT: por %xmm8, %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_smax_v64i8:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddb %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddb %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpmaxsb %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpmaxsb %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpmaxsb %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpmaxsb %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_smax_v64i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpmaxsb %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpmaxsb %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpmaxsb %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpmaxsb %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_smax_v64i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddb %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpmaxsb %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpmaxsb %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <64 x i8> %x0, %x1
%t1 = icmp sgt <64 x i8> %x2, %t0
@@ -2164,15 +2185,22 @@ define <32 x i16> @reassociate_smax_v32i
; SSE-NEXT: pmaxsw {{[0-9]+}}(%rsp), %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_smax_v32i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddw %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddw %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpmaxsw %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpmaxsw %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpmaxsw %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpmaxsw %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_smax_v32i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddw %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddw %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpmaxsw %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpmaxsw %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpmaxsw %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpmaxsw %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_smax_v32i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddw %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpmaxsw %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpmaxsw %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <32 x i16> %x0, %x1
%t1 = icmp sgt <32 x i16> %x2, %t0
@@ -2447,15 +2475,22 @@ define <64 x i8> @reassociate_umin_v64i8
; SSE-NEXT: pminub {{[0-9]+}}(%rsp), %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_umin_v64i8:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddb %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddb %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpminub %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpminub %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpminub %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpminub %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_umin_v64i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpminub %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpminub %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpminub %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpminub %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_umin_v64i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddb %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpminub %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpminub %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <64 x i8> %x0, %x1
%t1 = icmp ult <64 x i8> %x2, %t0
@@ -2507,15 +2542,22 @@ define <32 x i16> @reassociate_umin_v32i
; SSE-NEXT: pxor %xmm4, %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_umin_v32i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddw %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddw %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpminuw %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpminuw %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpminuw %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpminuw %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_umin_v32i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddw %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddw %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpminuw %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpminuw %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpminuw %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpminuw %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_umin_v32i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddw %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpminuw %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpminuw %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <32 x i16> %x0, %x1
%t1 = icmp ult <32 x i16> %x2, %t0
@@ -2863,15 +2905,22 @@ define <64 x i8> @reassociate_smin_v64i8
; SSE-NEXT: por %xmm8, %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_smin_v64i8:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddb %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddb %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpminsb %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpminsb %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpminsb %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpminsb %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_smin_v64i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddb %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpminsb %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpminsb %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpminsb %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpminsb %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_smin_v64i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddb %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpminsb %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpminsb %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <64 x i8> %x0, %x1
%t1 = icmp slt <64 x i8> %x2, %t0
@@ -2898,15 +2947,22 @@ define <32 x i16> @reassociate_smin_v32i
; SSE-NEXT: pminsw {{[0-9]+}}(%rsp), %xmm3
; SSE-NEXT: retq
;
-; AVX-LABEL: reassociate_smin_v32i16:
-; AVX: # %bb.0:
-; AVX-NEXT: vpaddw %ymm2, %ymm0, %ymm0
-; AVX-NEXT: vpaddw %ymm3, %ymm1, %ymm1
-; AVX-NEXT: vpminsw %ymm1, %ymm5, %ymm1
-; AVX-NEXT: vpminsw %ymm0, %ymm4, %ymm0
-; AVX-NEXT: vpminsw %ymm0, %ymm6, %ymm0
-; AVX-NEXT: vpminsw %ymm1, %ymm7, %ymm1
-; AVX-NEXT: retq
+; AVX2-LABEL: reassociate_smin_v32i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpaddw %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vpaddw %ymm3, %ymm1, %ymm1
+; AVX2-NEXT: vpminsw %ymm1, %ymm5, %ymm1
+; AVX2-NEXT: vpminsw %ymm0, %ymm4, %ymm0
+; AVX2-NEXT: vpminsw %ymm0, %ymm6, %ymm0
+; AVX2-NEXT: vpminsw %ymm1, %ymm7, %ymm1
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: reassociate_smin_v32i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpaddw %zmm1, %zmm0, %zmm0
+; AVX512-NEXT: vpminsw %zmm0, %zmm2, %zmm0
+; AVX512-NEXT: vpminsw %zmm0, %zmm3, %zmm0
+; AVX512-NEXT: retq
%t0 = add <32 x i16> %x0, %x1
%t1 = icmp slt <32 x i16> %x2, %t0
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