[llvm] r362532 - [Tests] Autogen a test so future changes are visible
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 10:29:55 PDT 2019
Author: reames
Date: Tue Jun 4 10:29:55 2019
New Revision: 362532
URL: http://llvm.org/viewvc/llvm-project?rev=362532&view=rev
Log:
[Tests] Autogen a test so future changes are visible
Oddly, I had to change a value name from "tmp0" to "bc0" to get the autogened test to pass. I'm putting this down to an oddity of update_test_checks or FileCheck, but don't understand it.
Modified:
llvm/trunk/test/Transforms/IndVarSimplify/iv-widen.ll
Modified: llvm/trunk/test/Transforms/IndVarSimplify/iv-widen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/iv-widen.ll?rev=362532&r1=362531&r2=362532&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/iv-widen.ll (original)
+++ llvm/trunk/test/Transforms/IndVarSimplify/iv-widen.ll Tue Jun 4 10:29:55 2019
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -indvars -S | FileCheck %s
; RUN: opt < %s -S -passes='lcssa,loop-simplify,require<targetir>,require<scalar-evolution>,require<domtree>,loop(indvars)' | FileCheck %s
@@ -9,17 +10,37 @@ target triple = "x86_64-apple-darwin"
declare void @use(i64 %x)
-; CHECK-LABEL: @loop_0
-; CHECK-LABEL: B18:
; Only one phi now.
-; CHECK: phi i64
-; CHECK-NOT: phi
; One trunc for the gep.
-; CHECK: trunc i64 %indvars.iv to i32
; One trunc for the dummy() call.
-; CHECK-LABEL: exit24:
-; CHECK: trunc i64 {{.*}}lcssa.wide to i32
define void @loop_0(i32* %a) {
+; CHECK-LABEL: @loop_0(
+; CHECK-NEXT: Prologue:
+; CHECK-NEXT: br i1 undef, label [[B18_PREHEADER:%.*]], label [[B6:%.*]]
+; CHECK: B18.preheader:
+; CHECK-NEXT: br label [[B18:%.*]]
+; CHECK: B18:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[B18_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[B24:%.*]] ]
+; CHECK-NEXT: call void @use(i64 [[INDVARS_IV]])
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT: [[O:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[TMP0]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[O]]
+; CHECK-NEXT: [[T:%.*]] = icmp eq i32 [[V]], 0
+; CHECK-NEXT: br i1 [[T]], label [[EXIT24:%.*]], label [[B24]]
+; CHECK: B24:
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 20
+; CHECK-NEXT: br i1 [[T2]], label [[B6_LOOPEXIT:%.*]], label [[B18]]
+; CHECK: B6.loopexit:
+; CHECK-NEXT: br label [[B6]]
+; CHECK: B6:
+; CHECK-NEXT: ret void
+; CHECK: exit24:
+; CHECK-NEXT: [[DOT02_LCSSA_WIDE:%.*]] = phi i64 [ [[INDVARS_IV]], [[B18]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[DOT02_LCSSA_WIDE]] to i32
+; CHECK-NEXT: call void @dummy(i32 [[TMP1]])
+; CHECK-NEXT: unreachable
+;
Prologue:
br i1 undef, label %B18, label %B6
@@ -46,11 +67,31 @@ exit24: ; preds = %
}
; Make sure that dead zext is removed and no widening happens.
-; CHECK-LABEL: @loop_0.dead
-; CHECK: phi i32
-; CHECK-NOT: zext
-; CHECK-NOT: trunc
-define void @loop_0.dead(i32* %a) {
+define void @loop_0_dead(i32* %a) {
+; CHECK-LABEL: @loop_0_dead(
+; CHECK-NEXT: Prologue:
+; CHECK-NEXT: br i1 undef, label [[B18_PREHEADER:%.*]], label [[B6:%.*]]
+; CHECK: B18.preheader:
+; CHECK-NEXT: br label [[B18:%.*]]
+; CHECK: B18:
+; CHECK-NEXT: [[DOT02:%.*]] = phi i32 [ [[TMP33:%.*]], [[B24:%.*]] ], [ 0, [[B18_PREHEADER]] ]
+; CHECK-NEXT: [[TMP33]] = add nuw i32 [[DOT02]], 1
+; CHECK-NEXT: [[O:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[DOT02]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[O]]
+; CHECK-NEXT: [[T:%.*]] = icmp eq i32 [[V]], 0
+; CHECK-NEXT: br i1 [[T]], label [[EXIT24:%.*]], label [[B24]]
+; CHECK: B24:
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[TMP33]], 20
+; CHECK-NEXT: br i1 [[T2]], label [[B6_LOOPEXIT:%.*]], label [[B18]]
+; CHECK: B6.loopexit:
+; CHECK-NEXT: br label [[B6]]
+; CHECK: B6:
+; CHECK-NEXT: ret void
+; CHECK: exit24:
+; CHECK-NEXT: [[DOT02_LCSSA:%.*]] = phi i32 [ [[DOT02]], [[B18]] ]
+; CHECK-NEXT: call void @dummy(i32 [[DOT02_LCSSA]])
+; CHECK-NEXT: unreachable
+;
Prologue:
br i1 undef, label %B18, label %B6
@@ -77,16 +118,29 @@ exit24: ; preds = %
define void @loop_1(i32 %lim) {
; CHECK-LABEL: @loop_1(
- entry:
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ne i32 [[LIM:%.*]], 0
+; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
+; CHECK: loop.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[LIM]] to i64
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, [[LOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT: call void @dummy.i64(i64 [[TMP1]])
+; CHECK-NEXT: [[BE_COND:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], [[TMP0]]
+; CHECK-NEXT: br i1 [[BE_COND]], label [[LOOP]], label [[LEAVE_LOOPEXIT:%.*]]
+; CHECK: leave.loopexit:
+; CHECK-NEXT: br label [[LEAVE]]
+; CHECK: leave:
+; CHECK-NEXT: ret void
+;
+ entry:
%entry.cond = icmp ne i32 %lim, 0
br i1 %entry.cond, label %loop, label %leave
- loop:
-; CHECK: loop:
-; CHECK: %indvars.iv = phi i64 [ 1, %loop.preheader ], [ %indvars.iv.next, %loop ]
-; CHECK: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-; CHECK: [[IV_INC:%[^ ]+]] = add nsw i64 %indvars.iv, -1
-; CHECK: call void @dummy.i64(i64 [[IV_INC]])
+ loop:
%iv = phi i32 [ 1, %entry ], [ %iv.inc, %loop ]
%iv.inc = add i32 %iv, 1
@@ -96,7 +150,7 @@ define void @loop_1(i32 %lim) {
%be.cond = icmp ult i32 %iv.inc, %lim
br i1 %be.cond, label %loop, label %leave
- leave:
+ leave:
ret void
}
@@ -106,9 +160,54 @@ declare void @dummy.i64(i64)
define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8 %tmp1) {
; CHECK-LABEL: @loop_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1
+; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[LINED:%.*]] to i8*
+; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[SIZE]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[HSIZE:%.*]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[NSTEPS:%.*]] to i64
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[INDVARS_IV7:%.*]] = phi i64 [ [[INDVARS_IV_NEXT8:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[TMP3:%.*]] = mul nsw i64 [[INDVARS_IV7]], [[TMP0]]
+; CHECK-NEXT: [[TMP4:%.*]] = add nsw i64 [[TMP3]], [[TMP1]]
+; CHECK-NEXT: br i1 [[CMP215]], label [[FOR_BODY2_PREHEADER:%.*]], label [[FOR_INC]]
+; CHECK: for.body2.preheader:
+; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
+; CHECK: for.body2:
+; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, [[FOR_BODY2_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY2]] ]
+; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], [[INDVARS_IV]]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BC0]], i64 [[TMP5]]
+; CHECK-NEXT: store i8 [[TMP1:%.*]], i8* [[ADD_PTR]], align 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[SIZE]] to i64
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY2]], label [[FOR_BODY3_PREHEADER:%.*]]
+; CHECK: for.body3.preheader:
+; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP4]] to i32
+; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
+; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
+; CHECK: for.body3:
+; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ 1, [[FOR_BODY3_PREHEADER]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[FOR_BODY3]] ]
+; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i64 [[TMP7]], [[INDVARS_IV2]]
+; CHECK-NEXT: [[ADD_PTR2:%.*]] = getelementptr inbounds i8, i8* [[BC0]], i64 [[TMP8]]
+; CHECK-NEXT: store i8 [[TMP1]], i8* [[ADD_PTR2]], align 1
+; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
+; CHECK-NEXT: [[WIDE_TRIP_COUNT5:%.*]] = zext i32 [[SIZE]] to i64
+; CHECK-NEXT: [[EXITCOND6:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], [[WIDE_TRIP_COUNT5]]
+; CHECK-NEXT: br i1 [[EXITCOND6]], label [[FOR_BODY3]], label [[FOR_INC_LOOPEXIT:%.*]]
+; CHECK: for.inc.loopexit:
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT8]], [[TMP2]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
+; CHECK: for.end.loopexit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp215 = icmp sgt i32 %size, 1
- %tmp0 = bitcast i32* %lined to i8*
+ %bc0 = bitcast i32* %lined to i8*
br label %for.body
for.body:
@@ -118,33 +217,22 @@ for.body:
br i1 %cmp215, label %for.body2, label %for.inc
; check that the induction variable of the inner loop has been widened after indvars.
-; CHECK: [[INNERLOOPINV:%[^ ]+]] = add nsw i64
-; CHECK: for.body2:
-; CHECK-NEXT: %indvars.iv = phi i64 [ 1, %for.body2.preheader ], [ %indvars.iv.next, %for.body2 ]
-; CHECK-NEXT: [[WIDENED:%[^ ]+]] = add nsw i64 [[INNERLOOPINV]], %indvars.iv
-; CHECK-NEXT: %add.ptr = getelementptr inbounds i8, i8* %tmp0, i64 [[WIDENED]]
for.body2:
%k = phi i32 [ %inc, %for.body2 ], [ 1, %for.body ]
%add4 = add nsw i32 %add, %k
%idx.ext = sext i32 %add4 to i64
- %add.ptr = getelementptr inbounds i8, i8* %tmp0, i64 %idx.ext
+ %add.ptr = getelementptr inbounds i8, i8* %bc0, i64 %idx.ext
store i8 %tmp1, i8* %add.ptr, align 1
%inc = add nsw i32 %k, 1
%cmp2 = icmp slt i32 %inc, %size
br i1 %cmp2, label %for.body2, label %for.body3
; check that the induction variable of the inner loop has been widened after indvars.
-; CHECK: for.body3.preheader:
-; CHECK: [[INNERLOOPINV:%[^ ]+]] = zext i32
-; CHECK: for.body3:
-; CHECK-NEXT: %indvars.iv2 = phi i64 [ 1, %for.body3.preheader ], [ %indvars.iv.next3, %for.body3 ]
-; CHECK-NEXT: [[WIDENED:%[^ ]+]] = add nuw nsw i64 [[INNERLOOPINV]], %indvars.iv2
-; CHECK-NEXT: %add.ptr2 = getelementptr inbounds i8, i8* %tmp0, i64 [[WIDENED]]
for.body3:
%l = phi i32 [ %inc2, %for.body3 ], [ 1, %for.body2 ]
%add5 = add nuw i32 %add, %l
%idx.ext2 = zext i32 %add5 to i64
- %add.ptr2 = getelementptr inbounds i8, i8* %tmp0, i64 %idx.ext2
+ %add.ptr2 = getelementptr inbounds i8, i8* %bc0, i64 %idx.ext2
store i8 %tmp1, i8* %add.ptr2, align 1
%inc2 = add nsw i32 %l, 1
%cmp3 = icmp slt i32 %inc2, %size
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