[PATCH] D59990: AMDGPU. Divergence driven ISel. Assign register class for cross block values according to the divergence.

[Alexander via Phabricator via llvm-commits]

alex-t added a comment.

In D59990#1527276 <https://reviews.llvm.org/D59990#1527276>, @hakzsam wrote:

> In D59990#1527275 <https://reviews.llvm.org/D59990#1527275>, @hakzsam wrote:
>
> > In D59990#1521409 <https://reviews.llvm.org/D59990#1521409>, @alex-t wrote:
> >
> > > In D59990#1517891 <https://reviews.llvm.org/D59990#1517891>, @hakzsam wrote:
> > >
> > > > Hi there,
> > > >
> > > > This change introduces a regression with RADV, all dEQP-VK.subgroups.arithmetic.framebuffer.* are failing now.
> > > >  Can someone look into this?
> > > >  Thanks!
> > >
> > >
> > > I have a patch that fixes the issue in another test suite. Could you please suggest how to check if it also fixes RADV?
> > >  https://reviews.llvm.org/D62614
> >
> >
> > This patch fixes the CTS failures on my side. I have just tried the latest version.
>
>
> Err, only a subset is fixed actually.


I have updated the change ttps://reviews.llvm.org/D62614 this Sunday.
The new one takes completely different approach. I'd appreciate very much If you could try  it.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59990/new/

https://reviews.llvm.org/D59990