[llvm] r362471 - [NFC] Update the test to check the endianness after the CodeGenPrepare instead of checking the assembly instructions.

[QingShan Zhang via llvm-commits]

Author: qshanz
Date: Tue Jun  4 01:45:07 2019
New Revision: 362471

URL: http://llvm.org/viewvc/llvm-project?rev=362471&view=rev
Log:
[NFC] Update the test to check the endianness after the CodeGenPrepare instead of checking the assembly instructions.


Modified:
    llvm/trunk/test/CodeGen/SystemZ/codegenprepare-splitstore.ll

Modified: llvm/trunk/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/codegenprepare-splitstore.ll?rev=362471&r1=362470&r2=362471&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/codegenprepare-splitstore.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/codegenprepare-splitstore.ll Tue Jun  4 01:45:07 2019
@@ -1,14 +1,22 @@
 ; Test that CodeGenPrepare respects endianness when splitting a store.
 ;
-; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -force-split-store < %s  | FileCheck %s
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -stop-after codegenprepare -force-split-store < %s  | FileCheck %s
 
 define void @fun(i16* %Src, i16* %Dst) {
-; CHECK-LABEL: # %bb.0:
-; CHECK:       lh   %r0, 0(%r2)
-; CHECK-NEXT:  stc  %r0, 1(%r3)
-; CHECK-NEXT:  srl  %r0, 8
-; CHECK-NEXT:  stc  %r0, 0(%r3)
-; CHECK-NEXT:  br   %r14
+; CHECK-LABEL: @fun(
+; CHECK:      %1 = load i16, i16* %Src
+; CHECK-NEXT: %2 = trunc i16 %1 to i8
+; CHECK-NEXT: %3 = lshr i16 %1, 8
+; CHECK-NEXT: %4 = trunc i16 %3 to i8
+; CHECK-NEXT: %5 = zext i8 %2 to i16
+; CHECK-NEXT: %6 = zext i8 %4 to i16
+; CHECK-NEXT: %7 = shl nuw i16 %6, 8
+; CHECK-NEXT: %8 = or i16 %7, %5
+; CHECK-NEXT: %9 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: %10 = getelementptr i8, i8* %9, i32 1
+; CHECK-NEXT: store i8 %2, i8* %10
+; CHECK-NEXT: %11 = bitcast i16* %Dst to i8*
+; CHECK-NEXT: store i8 %4, i8* %11
   %1 = load i16, i16* %Src
   %2 = trunc i16 %1 to i8
   %3 = lshr i16 %1, 8